Re: [PATCH v5] dt-bindings: iio: adc: Convert xilinx-xadc bindings to YAML schema
From: Nagavarapu, Dileep Kumar
Date: Thu Nov 12 2026 - 07:39:26 EST
Hi Jonathan,
On 11/8/2026 12:56 AM, Jonathan Cameron wrote:
Caution: This message originated from an External Source. Use proper caution when opening attachments, clicking links, or responding.
On Sat, 7 Nov 2026 19:19:55 +0530
Dileep Kumar Nagavarapu <dileepkumar.nagavarapu@xxxxxxx> wrote:
From: Pramod Maurya <pramod.nexgen@xxxxxxxxx>
Convert the Xilinx XADC and UltraScale System Monitor device tree binding
from the legacy plain-text format to a YAML.
The new binding covers the same hardware and compatible strings:
- xlnx,zynq-xadc-1.00.a (ZYNQ hardblock)
- xlnx,axi-xadc-1.00.a (AXI softblock)
- xlnx,system-management-wiz-1.3 (UltraScale System Management Wizard)
The xlnx,channels subnode retains its legacy name (including the comma)
for backwards compatibility with existing device trees.
Move xlnx,channels under properties, as dt-schema now allows node names
containing a comma for long-established bindings.Constrain the reg
Space after .
property of the channel subnodes to the valid channel range of 0 to
16 with minimum and maximum.
Drop the redundant "type: boolean" from xlnx,bipolar, since its $ref to
the flag type already implies it.
Signed-off-by: Pramod Maurya <pramod.nexgen@xxxxxxxxx>
Co-developed-by: Dileep Kumar Nagavarapu <dileepkumar.nagavarapu@xxxxxxx>
Signed-off-by: Dileep Kumar Nagavarapu <dileepkumar.nagavarapu@xxxxxxx>
Hi Dileep,
Given the legacy nature of the binding this looks fine to me.
I noted a few things on how I think it would look today, but not
expecting any changes to this doc based on those.
I do want an Ack from Lars-Peter Clausen though if we are going
to more formally list him as maintainer. No idea if he has time
to keep an eye on this one!
As I understand, Lars-Peter is no longer active, so I’ll remove him from the maintainers list for now and continue to CC him on future versions.
Jonathan
---
.../bindings/iio/adc/xilinx-xadc.txt | 141 ---------------
.../bindings/iio/adc/xlnx,xadc.yaml | 165 ++++++++++++++++++
MAINTAINERS | 9 +
3 files changed, 174 insertions(+), 141 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/iio/adc/xilinx-xadc.txt
create mode 100644 Documentation/devicetree/bindings/iio/adc/xlnx,xadc.yaml
diff --git a/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.txt b/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.txt
deleted file mode 100644
index f42e18078376..000000000000
--- a/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.txt
+++ /dev/null
diff --git a/Documentation/devicetree/bindings/iio/adc/xlnx,xadc.yaml b/Documentation/devicetree/bindings/iio/adc/xlnx,xadc.yaml
new file mode 100644
index 000000000000..2cbc3b82a26f
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/adc/xlnx,xadc.yaml
@@ -0,0 +1,165 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/adc/xlnx,xadc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Xilinx XADC and UltraScale System Monitor
+
+maintainers:
+ - Lars-Peter Clausen <lars@xxxxxxxxxx>
As below. Need an Ack from Lars-Peter.
+ - Sai Krishna Potthuri <sai.krishna.potthuri@xxxxxxx>
+ - Dileep Kumar Nagavarapu <dileepkumar.nagavarapu@xxxxxxx>
+
+description: |
+ The Xilinx XADC is an ADC found in the Series 7 FPGAs. It has a DRP
+ (Dynamic Reconfiguration Port) interface for communication. Two different
+ frontends for the DRP interface are supported:
+
+ - ZYNQ hardblock: available only on the ZYNQ family as a hardblock in
+ the SoC portion of the ZYNQ device.
+ - AXI softblock: available on all Series 7 platforms as a softblock
+ with an AXI interface (PG019).
+
+ The Xilinx System Monitor is an ADC found in UltraScale and UltraScale+
+ FPGAs. It is accessed through the Xilinx System Management Wizard IP core
+ via an AXI interface in the FPGA fabric.
+
+ The xlnx,channels subnode name contains a comma as part of the legacy
+ device tree binding that has been in use for over a decade. This name is
+ retained for backwards compatibility with existing device trees.
+
+properties:
+ compatible:
+ enum:
+ - xlnx,zynq-xadc-1.00.a
+ - xlnx,axi-xadc-1.00.a
+ - xlnx,system-management-wiz-1.3
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ xlnx,external-mux:
+ $ref: /schemas/types.yaml#/definitions/string
+ description:
+ Selects the external multiplexer mode.
+ enum:
+ - none
+ - single
+ - dual
+ default: none
+
+ xlnx,external-mux-channel:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: |
+ Configures which pair of pins is used to sample data in external
+ multiplexer mode. Required when xlnx,external-mux is "single" or
+ "dual".
I guess this is a legacy binding, but if we were doing this today we'd
put an explicit mux consumer in front of it that makes use of the
channel via the io-channels consumer mapping stuff.
My guess is that stuff all came in well after this driver!
This is also rather inflexible as why can't we have a 4
channel mux that is therefore in front of 4 ADC channels?
+
+ Valid values for single external multiplexer mode:
+ 0: VP/VN
+ 1: VAUXP[0]/VAUXN[0]
+ 2: VAUXP[1]/VAUXN[1]
+ ...
+ 16: VAUXP[15]/VAUXN[15]
+
+ Valid values for dual external multiplexer mode:
+ 1: VAUXP[0]/VAUXN[0] - VAUXP[8]/VAUXN[8]
+ 2: VAUXP[1]/VAUXN[1] - VAUXP[9]/VAUXN[9]
+ ...
+ 8: VAUXP[7]/VAUXN[7] - VAUXP[15]/VAUXN[15]
+ minimum: 0
+ maximum: 16
+
+ xlnx,channels:
+ type: object
+ description:
+ List of external channels connected to the ADC. If this node is
+ absent, no external channels are assumed to be connected.
+
+ properties:
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 0
+
+ patternProperties:
+ "^channel@([0-9a-f]|10)$":
+ type: object
+ description:
+ Represents an external channel connected to the ADC.
+
+ properties:
+ reg:
+ description: |
+ Pair of pins the channel is connected to.
+ 0: VP/VN
+ 1: VAUXP[0]/VAUXN[0]
+ 2: VAUXP[1]/VAUXN[1]
+ ...
+ 16: VAUXP[15]/VAUXN[15]
Another legacy one which is fine. If we were doing this today
we'd use diff-channels rather than reg to specify this I think.
+ minimum: 0
+ maximum: 16
+
+ xlnx,bipolar:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description:
+ If set, the channel is used in bipolar mode.
+
+ required:
+ - reg
+
+ additionalProperties: false
+
+ required:
+ - '#address-cells'
+ - '#size-cells'
+
+ additionalProperties: false
+
+allOf:
+ - if:
+ properties:
+ xlnx,external-mux:
+ enum:
+ - single
+ - dual
+ required:
+ - xlnx,external-mux
+ then:
+ required:
+ - xlnx,external-mux-channel
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ xadc@43200000 {
+ compatible = "xlnx,axi-xadc-1.00.a";
+ reg = <0x43200000 0x1000>;
+ interrupts = <0 53 4>;
+ interrupt-parent = <&gic>;
+ clocks = <&fpga1_clk>;
+
+ xlnx,channels {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ channel@0 {
+ reg = <0>;
+ xlnx,bipolar;
+ };
+ };
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index 745d8d0169b2..2d7e9c9ca659 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -29996,6 +29996,15 @@ F: Documentation/devicetree/bindings/watchdog/xlnx,xps-timebase-wdt.yaml
F: drivers/watchdog/of_xilinx_wdt.c
F: drivers/watchdog/xilinx_wwdt.c
+XILINX XADC DRIVER
+M: Lars-Peter Clausen <lars@xxxxxxxxxx>
I'll need an Ack from Lars-Peter for that. Whilst sometimes about
Lars isn't anywhere near as active as he once was.
+M: Sai Krishna Potthuri <sai.krishna.potthuri@xxxxxxx>
+M: Dileep Kumar Nagavarapu <dileepkumar.nagavarapu@xxxxxxx>
+L: linux-iio@xxxxxxxxxxxxxxx
+S: Maintained
+F: Documentation/devicetree/bindings/iio/adc/xlnx,xadc.yaml
+F: drivers/iio/adc/xilinx-xadc*
Thanks,
Dileep