Re: [PATCH v2 1/3] clk: divider: Fix the divisor for rates above 4.29 GHz

[Carlo Caione]

On Thu, Nov 12, 2026 at 10:09:46 +0100, Brian Masney wrote:
> Hi Carlo,

Hi Brian,

> >  static int _div_round_up(const struct clk_div_table *table,
> >  			 unsigned long parent_rate, unsigned long rate,
> >  			 unsigned long flags)
> >  {
> > -	int div = DIV_ROUND_UP_ULL((u64)parent_rate, rate);
> > +	int div = _get_div_round_up(parent_rate, rate);
> 
> _get_div_round_up() returns an unsigned long however it's downsized to
> an int here.

Right, but wasn't also DIV_ROUND_UP_ULL() previously returning a u64
that was stored in the same int?

thanks,

--
Carlo Caione