[PATCH v4 2/2] arm64: dts: qcom: nord: wire up GPI DMA for QUP I2C/SPI engines
From: Bartosz Golaszewski
Date: Fri Nov 13 2026 - 07:39:40 EST
Add DMA phandles to I2C and SPI QUPv3 serial engine nodes.
Reviewed-by: Shawn Guo <shengchao.guo@xxxxxxxxxxxxxxxx>
Reviewed-by: Abel Vesa <abel.vesa@xxxxxxxxxxxxxxxx>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@xxxxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/nord.dtsi | 124 +++++++++++++++++++++++++++++++++++++
1 file changed, 124 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/nord.dtsi b/arch/arm64/boot/dts/qcom/nord.dtsi
index 68787db708f613d61c4b88762bc31259304e7f71..818f6054bcec8b020f25b25a774191942e98edbe 100644
--- a/arch/arm64/boot/dts/qcom/nord.dtsi
+++ b/arch/arm64/boot/dts/qcom/nord.dtsi
@@ -1071,6 +1071,10 @@ i2c14: i2c@880000 {
reg = <0x0 0x00880000 0x0 0x4000>;
interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma2 0 0 QCOM_GPI_I2C>,
+ <&gpi_dma2 1 0 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1098,6 +1102,10 @@ i2c15: i2c@884000 {
reg = <0x0 0x00884000 0x0 0x4000>;
interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma2 0 1 QCOM_GPI_I2C>,
+ <&gpi_dma2 1 1 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1125,6 +1133,10 @@ i2c16: i2c@888000 {
reg = <0x0 0x00888000 0x0 0x4000>;
interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma2 0 2 QCOM_GPI_I2C>,
+ <&gpi_dma2 1 2 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1152,6 +1164,10 @@ i2c17: i2c@88c000 {
reg = <0x0 0x0088c000 0x0 0x4000>;
interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma2 0 3 QCOM_GPI_I2C>,
+ <&gpi_dma2 1 3 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1179,6 +1195,10 @@ i2c18: i2c@890000 {
reg = <0x0 0x00890000 0x0 0x4000>;
interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma2 0 4 QCOM_GPI_I2C>,
+ <&gpi_dma2 1 4 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1206,6 +1226,10 @@ i2c19: i2c@894000 {
reg = <0x0 0x00894000 0x0 0x4000>;
interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma2 0 5 QCOM_GPI_I2C>,
+ <&gpi_dma2 1 5 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1233,6 +1257,10 @@ i2c20: i2c@898000 {
reg = <0x0 0x00898000 0x0 0x4000>;
interrupts = <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma2 0 6 QCOM_GPI_I2C>,
+ <&gpi_dma2 1 6 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1244,6 +1272,10 @@ spi20: spi@898000 {
reg = <0x0 0x00898000 0x0 0x4000>;
interrupts = <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma2 0 6 QCOM_GPI_SPI>,
+ <&gpi_dma2 1 6 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
+
status = "disabled";
};
@@ -1290,6 +1322,10 @@ i2c0: i2c@980000 {
reg = <0x0 0x00980000 0x0 0x4000>;
interrupts = <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>,
+ <&gpi_dma0 1 0 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1309,6 +1345,10 @@ uart0: serial@980000 {
reg = <0x0 0x00980000 0x0 0x4000>;
interrupts = <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>,
+ <&gpi_dma0 1 0 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
+
status = "disabled";
};
@@ -1317,6 +1357,10 @@ i2c1: i2c@984000 {
reg = <0x0 0x00984000 0x0 0x4000>;
interrupts = <GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
+ <&gpi_dma0 1 1 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1336,6 +1380,10 @@ uart1: serial@984000 {
reg = <0x0 0x00984000 0x0 0x4000>;
interrupts = <GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
+ <&gpi_dma0 1 1 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
+
status = "disabled";
};
@@ -1344,6 +1392,10 @@ i2c2: i2c@988000 {
reg = <0x0 0x00988000 0x0 0x4000>;
interrupts = <GIC_SPI 514 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>,
+ <&gpi_dma0 1 2 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1363,6 +1415,10 @@ uart2: serial@988000 {
reg = <0x0 0x00988000 0x0 0x4000>;
interrupts = <GIC_SPI 514 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>,
+ <&gpi_dma0 1 2 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
+
status = "disabled";
};
@@ -1371,6 +1427,10 @@ i2c3: i2c@98c000 {
reg = <0x0 0x0098c000 0x0 0x4000>;
interrupts = <GIC_SPI 515 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>,
+ <&gpi_dma0 1 3 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1390,6 +1450,10 @@ uart3: serial@98c000 {
reg = <0x0 0x0098c000 0x0 0x4000>;
interrupts = <GIC_SPI 515 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>,
+ <&gpi_dma0 1 3 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
+
status = "disabled";
};
@@ -1398,6 +1462,10 @@ i2c4: i2c@990000 {
reg = <0x0 0x00990000 0x0 0x4000>;
interrupts = <GIC_SPI 516 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>,
+ <&gpi_dma0 1 4 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1425,6 +1493,10 @@ i2c5: i2c@994000 {
reg = <0x0 0x00994000 0x0 0x4000>;
interrupts = <GIC_SPI 517 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>,
+ <&gpi_dma0 1 5 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1436,6 +1508,10 @@ spi5: spi@994000 {
reg = <0x0 0x00994000 0x0 0x4000>;
interrupts = <GIC_SPI 517 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>,
+ <&gpi_dma0 1 5 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
+
status = "disabled";
};
@@ -1482,6 +1558,10 @@ i2c7: i2c@a80000 {
reg = <0x0 0x00a80000 0x0 0x4000>;
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma1 0 0 QCOM_GPI_I2C>,
+ <&gpi_dma1 1 0 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1501,6 +1581,10 @@ uart7: serial@a80000 {
reg = <0x0 0x00a80000 0x0 0x4000>;
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma1 0 0 QCOM_GPI_SPI>,
+ <&gpi_dma1 1 0 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
+
status = "disabled";
};
@@ -1509,6 +1593,10 @@ i2c8: i2c@a84000 {
reg = <0x0 0x00a84000 0x0 0x4000>;
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,
+ <&gpi_dma1 1 1 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1528,6 +1616,10 @@ uart8: serial@a84000 {
reg = <0x0 0x00a84000 0x0 0x4000>;
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>,
+ <&gpi_dma1 1 1 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
+
status = "disabled";
};
@@ -1536,6 +1628,10 @@ i2c9: i2c@a88000 {
reg = <0x0 0x00a88000 0x0 0x4000>;
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma1 0 2 QCOM_GPI_I2C>,
+ <&gpi_dma1 1 2 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1555,6 +1651,10 @@ i2c10: i2c@a8c000 {
reg = <0x0 0x00a8c000 0x0 0x4000>;
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma1 0 3 QCOM_GPI_I2C>,
+ <&gpi_dma1 1 3 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1574,6 +1674,10 @@ i2c11: i2c@a90000 {
reg = <0x0 0x00a90000 0x0 0x4000>;
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma1 0 4 QCOM_GPI_I2C>,
+ <&gpi_dma1 1 4 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1593,6 +1697,10 @@ uart11: serial@a90000 {
reg = <0x0 0x00a90000 0x0 0x4000>;
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma1 0 4 QCOM_GPI_SPI>,
+ <&gpi_dma1 1 4 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
+
status = "disabled";
};
@@ -1601,6 +1709,10 @@ i2c12: i2c@a94000 {
reg = <0x0 0x00a94000 0x0 0x4000>;
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma1 0 5 QCOM_GPI_I2C>,
+ <&gpi_dma1 1 5 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1620,6 +1732,10 @@ uart12: serial@a94000 {
reg = <0x0 0x00a94000 0x0 0x4000>;
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma1 0 5 QCOM_GPI_SPI>,
+ <&gpi_dma1 1 5 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
+
status = "disabled";
};
@@ -1628,6 +1744,10 @@ i2c13: i2c@a98000 {
reg = <0x0 0x00a98000 0x0 0x4000>;
interrupts = <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma1 0 6 QCOM_GPI_I2C>,
+ <&gpi_dma1 1 6 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1639,6 +1759,10 @@ spi13: spi@a98000 {
reg = <0x0 0x00a98000 0x0 0x4000>;
interrupts = <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma1 0 6 QCOM_GPI_SPI>,
+ <&gpi_dma1 1 6 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
+
status = "disabled";
};
--
2.47.3