[PATCH RESEND 0/2] clk: mediatek: Fix FHCTL DDS mask widths for mt8173, mt6795

From: Ryan Brue

Date: Fri Nov 13 2026 - 16:09:17 EST


Discovered this while working on bringup for the Amazon Fire HD 10 (2017).

In f222a1baec5f ("clk: mediatek: mt6795: Add support for frequency hopping
through FHCTL"), and 45a5cbe05d1f ("clk: mediatek: mt8173: Add support
for frequency hopping through FHCTL"), the DDS masks were set to the same
GENMASK(21, 0) as mt8186, mt8192, and mt8195, despite not having the same
pcwbits (21 as opposed to 22). These two patches correct that.

Tested on an Amazon Fire HD 10 (2017), an mt8173 tablet, across 6 MMPLL
rate changes. All of them timed out prior to this patchset, and all of
them succeed with the patchset. mt8173 currently doesn't use FHCTL, but
this will correct it for the future in case it does get used.

I do not have an mt6795 to test with, but mt6795-sony-xperia-m5.dts is an
actual consumer of the FHCTL node, and switches it on for mainpll, mpll
and msdcpll. If someone has that device to test the second patch, that
would be appreciated. I do believe this is the correct fix though
regardless.

Signed-off-by: Ryan Brue <ryanbrue.dev@xxxxxxxxx>
---
RESEND: no changes since v1 [1], rebased onto v7.4-rc2, with Angelo's
Reviewed-by collected. Jerome noted these go through Angelo's MediaTek clk
pull request for 7.5. The Assisted-by: LLM trailer is dropped for the new
contributing guidelines.

The patches were still developed with the help of an LLM.

[1] https://lore.kernel.org/all/20260912-mt8173-fix-dds-mask-width-v1-0-3d0c0292c85c@xxxxxxxxx/

---
Ryan Brue (2):
clk: mediatek: mt8173: fix the FHCTL DDS mask width
clk: mediatek: mt6795: fix the FHCTL DDS mask width

drivers/clk/mediatek/clk-mt6795-apmixedsys.c | 2 +-
drivers/clk/mediatek/clk-mt8173-apmixedsys.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
---
base-commit: 7475ea8b58616b33c04afb976cf0fbaad9dd63fb
change-id: 20260912-mt8173-fix-dds-mask-width-6cb71c6fe4d1

Best regards,
--
Ryan Brue <ryanbrue.dev@xxxxxxxxx>