[PATCH 10/19] clk: sunxi-ng: sun6i-rtc: allow another 24 MHz to 32k divider ratio

[Han Gao via B4 Relay]

From: Han Gao <gaohan@xxxxxxxxxxx>

The fixed 24 MHz to 32 kHz divider does not divide by 750 on all
variants. Allow the match data to override its multiplier and divider.

Signed-off-by: Han Gao <gaohan@xxxxxxxxxxx>
---
 drivers/clk/sunxi-ng/ccu-sun6i-rtc.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/clk/sunxi-ng/ccu-sun6i-rtc.c b/drivers/clk/sunxi-ng/ccu-sun6i-rtc.c
index 0e40fd5fa624..b3619222fef0 100644
--- a/drivers/clk/sunxi-ng/ccu-sun6i-rtc.c
+++ b/drivers/clk/sunxi-ng/ccu-sun6i-rtc.c
@@ -54,6 +54,8 @@ struct sun6i_rtc_match_data {
 	bool				have_dcxo_status	: 1;
 	bool				have_phy_ref_gates	: 1;
 	bool				rtc_32k_single_parent	: 1;
+	unsigned int			osc24M_32k_mult;
+	unsigned int			osc24M_32k_div;
 	const struct clk_parent_data	*osc32k_fanout_parents;
 	u8				osc32k_fanout_nparents;
 };
@@ -436,6 +438,11 @@ int sun6i_rtc_ccu_probe(struct device *dev, void __iomem *reg)
 	if (data->rtc_32k_single_parent)
 		rtc_32k_init_data.num_parents = 1;
 
+	if (data->osc24M_32k_div) {
+		osc24M_32k_div_clk.mult = data->osc24M_32k_mult;
+		osc24M_32k_div_clk.div = data->osc24M_32k_div;
+	}
+
 	if (data->osc32k_fanout_nparents) {
 		osc32k_fanout_init_data.parent_data = data->osc32k_fanout_parents;
 		osc32k_fanout_init_data.num_parents = data->osc32k_fanout_nparents;

-- 
2.55.0