Re: [PATCH] clk: sunxi-ng: h6: Keep both parents running while switching VP9 clock

[Chen-Yu Tsai]

On Tue, 10 Nov 2026 17:39:04 +0100, Jernej Skrabec wrote:
> The VP9 clock mux only switches while both parents are running. Its
> reset default parent is pll-ve, which is off at boot. When the Hantro
> driver sets the clock rate to 300 MHz, the clock gets reparented to
> pll-periph0-2x, but the mux doesn't actually switch until pll-ve is
> enabled for the video engine. Until then, the VP9 decoder has no clock
> and every frame times out.
> 
> [...]

Applied to sunxi/clk-for-7.5 in sunxi, thanks!

[1/1] clk: sunxi-ng: h6: Keep both parents running while switching VP9 clock
      https://git.kernel.org/sunxi/linux/c/b6844de23cd2

Best regards,
-- 
Chen-Yu Tsai <wens@xxxxxxxxxx>