Re: [PATCH v3 3/7] arm64: dts: allwinner: h616: Add GPU OPP table

[Chen-Yu Tsai]

On Thu, Nov 12, 2026 at 5:22 PM Arun Iyengar via B4 Relay
<devnull+aiyengar1990.gmail.com@xxxxxxxxxx> wrote:
>
> From: Arun Iyengar <aiyengar1990@xxxxxxxxx>
>
> Add the operating points of the H616/H618 Mali-G31, so that boards can
> enable GPU DVFS through panfrost devfreq: 306 to 600 MHz at 810 to
> 950 mV. The table is the one of the vendor images (as recovered from a
> KickPi K2B image, also carried by Armbian). Like the H6 GPU OPP table,
> it uses <target target max> voltage triplets with a common 990 mV
> maximum: a board whose GPU supply cannot reach an OPP's target voltage
> loses that OPP, while a board whose supply minimum is above the target
> of the lower OPPs keeps them, as their [target, max] range still
> overlaps the supply's range.
>
> Like sun50i-h616-cpu-opp.dtsi, the table is in a separate file that
> boards include once their GPU supply is described.
>
> Signed-off-by: Arun Iyengar <aiyengar1990@xxxxxxxxx>
> ---
>  .../boot/dts/allwinner/sun50i-h616-gpu-opp.dtsi    | 62 ++++++++++++++++++++++
>  1 file changed, 62 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-gpu-opp.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-gpu-opp.dtsi
> new file mode 100644
> index 000000000000..18989d11c832
> --- /dev/null
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-gpu-opp.dtsi
> @@ -0,0 +1,62 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +// Copyright (C) 2026 Arun Iyengar <aiyengar1990@xxxxxxxxx>
> +
> +/ {
> +       gpu_opp_table: opp-table-gpu {
> +               compatible = "operating-points-v2";
> +
> +               opp-306000000 {
> +                       opp-hz = /bits/ 64 <306000000>;
> +                       opp-microvolt = <810000 810000 990000>;
> +               };
> +
> +               opp-336000000 {
> +                       opp-hz = /bits/ 64 <336000000>;
> +                       opp-microvolt = <810000 810000 990000>;
> +               };

Just a note, found by my review agent:

The temporary clock for the GPU module is currently pinned at 400 MHz.
So say you are just jumping between the lower OPPs, you go from
306 MHz -> 400 MHz -> 336 MHz, all the while the voltage could still be
0.81V. This is likely going to cause issues.

I suggest sending a separate patch to increase the pinned divider for
GPU_CLK1 from 3 to 4, which would give a *really* safe clock rate of
300 MHz.


ChenYu