MSRs 0x12 and 0x13 are the counters themselves. These are 40-bit registers.
Here are some of the more interesting counters (numbers in hex):
0/1: data read/write
2: data TLB miss
3/4: data cache read/write miss
6: data cache lines written back
9: memory accesses in both pipes
A: bank conflicts (both pipes accessing the same cache area at the same time)
C: code read
D: code TLB miss
E: code cache miss
12: branches
13: BTB hits
14: taken branch or BTB hit
15: pipeline flushes
16: total instructions executed
17: instructions executed in second pipe
22: floating point operations
27: hardware interrupt
I found this information in the german computer magazine "c't". It may or
may not be accurate, but usually they know what they are talking about.
Unfortunately, I neither have a P6 nor documentation about it, or maybe I
would have tried to make this more general.
I've included a small example program that tests counters 0x16 and 0x17 to
show how to use the new syscalls. Run it a few times with or without other
processes active at the same time. The counter values should not differ by
a large amount between runs, but the cycle count will differ a lot.
Comments/suggestions are appreciated.
Bernd
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`
end