reboot your machine in advance to each test (and don't start any daemon
and more important the network that you don't really need).
> I am guessing that one contribution is the load point of
> the code since it could change overlap in cache. Any thing else is
> beyond me. System time is on the order of .2 sec as reported by
> the time command. The variation noted is when running the identical
> code repeatedly and it doesn't appear to have any cyclic effect.
the physical positions where the pages your "virtually linear" process
address space get mapped to are much more important.
for the best case you'll really get linear physical memory pages mapped,
so your L1 and L2 cache work reasonable for sequential memory accesses.
BUT it might also happen that all your pages are mapped to physical
addresses 256K apard from each other. now think what your L2 cache does
for "virtually" linear sequential memory accesses...
and this virtual->physical page mapping fragments quite rapidly resulting
in not achieving the "best case" anymore very soon after boot.
Harald
-- All SCSI disks will from now on ___ _____ be required to send an email notice 0--,| /OOOOOOO\ 24 hours prior to complete hardware failure! <_/ / /OOOOOOOOOOO\ \ \/OOOOOOOOOOOOOOO\ \ OOOOOOOOOOOOOOOOO|// Harald Koenig, \/\/\/\/\/\/\/\/\/ Inst.f.Theoret.Astrophysik // / \\ \ koenig@tat.physik.uni-tuebingen.de ^^^^^ ^^^^^