If you are waiting then you could disable the interrupt during the
wait. However, the disable just disables the delivery of the interrupt
to the CPU, what is to stop the device interrupting and clearing its
status register?
Dave
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David A Rusling Principal Engineer
European Semiconductor Applications Digital Equipment Co Ltd.,
Engineering PO Box 121,
Imperial Way,
Worton Grange
Reading RG2 0TU
Linux, Alpha, StrongArm, PCI Tel: UK-(0)1734-204380
Fax: UK-(0)1734-203133
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