>It was presumed that, during a context switch FSAVE and FRSTOR will be
>executed to save/restore the state of the FP Unit. If executed, these
>instructions should automatically save and restore the MMX register(s)
>also. I don't know if they have to extend the buffer length for this
>operation. If so, the point is moot because the operating systems will
>have to be rewritten to provide this additional storage.
It wouldn't be difficult to add a feature to a new CPU which had to be
explicitely enabled from ring 0 before it could be used. Then if the OS
had allocated enough space for saving the registers it could enable the
feature. I expect that most OSs would quickly get patched to support a
feature such as MMX if it was added in that way.
Russell Coker