> 1) The memory mapped by 'vremap' is marked cacheable. This
> is (almost certainly) incorrect as it is memory that is
> actually device memory. Note that the mmap call used by
> X servers marks the memory as uncached.
The PC architecture is supposed to handle this for you. It could well
be an issue on MIPS and friends. The X one is hack and shouldnt be needed
Indeed, I recall reading somewhere in the 440FX Natoma (or 430HX) chipset
documentation that there was no caching on any PCI memory accesses.
Leonard