> Firstly the amount we "glue" a task to a processor. This is currently a bit
> high for pentia and low for P6's as a P6 wants more "stickiness" with its
> per CPU L2 cache. The other is switch rates. For a heavily CPU bound box doing
> pure number crunching rebuilding with HZ=2 can noticably improve performance
> while making interactive use totally sucky.
Are the micro-second resolution timers ever going to make it into the
kernel? It seems like the code is already there and working...
http://hegel.ittc.ukans.edu/projects/utime/
Regards,
Y.