I know that. That's why I tested the speed of some apps before making any
conclusions.
> The 6x86 wasn't designed to do SMP (at least
> Intel's version of SMP), as it does not have a true APIC. Given that, I
> wouldn't even try to run an SMP kernel on a 6x86. Last time I tried (by
> accident) I got a ton of oopses.
I have to test code which should be SMP clean (spinlocks), so I have to be
able to boot SMP kernels on my 6x86 UP machine.
I'm gonna test if 2.0.3x SMP kernels show the same strange behaviour.
What ports does the APIC code touch?
(Maybe we change the Clock multiplier from 2x to 0.5x this way or more likely
turn off the L1 cache.)
-- Kurt Garloff, Dortmund <K.Garloff@ping.de> PGP key on http://student.physik.uni-dortmund.de/homepages/garloff- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.rutgers.edu