This might be off-topic but the AMD K6 is very RISCish since it converts
the Intel CISC instructions down to the engine's RISC data pump. I really
wish they'd hurry with the K6+ and such since Intel is starting to pull
away in the lead from them. K6+ will basically be a K6 with Ppro properties..
L1 cache of 256k on the chip. Most excellent, and a pipelined FPU finally.
-- Forward thinking, backward compatible. God make Adam ribbed for Eve's pleasure Which is worse, ignorance or apathy? Who knows? Who cares?
- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.rutgers.edu