The term "RISC-like internal design" makes sense. I'm not completely sure about
how the Pentium looks inside, but for example the NexGen 586, (and this applies
to K6, too, but not to Cyrixes) was completely RISC inside - breaking up the
x86 instructions into RISC code and then executing the RISC instructions. It
could be even switched to RISC-only mode that'd fetch the RISC instructions
from memory directly without the x86->RISC translation.
If the Pentium follows a similar design, which it supposedly does, then I
think it can be called a "RISC-like internal design".
Vojtech Pavlik
-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.rutgers.edu