#Hello Alan,
Hey! We're getting to know eachother pretty good! :)
#Alan Cox wrote:
#....
#> No the xor/sahf/movb thing passes for some PII's (Im beginning to wonder
#> if this is a conspiracy) - Intel a) now pass the divide check and b)
#> happen to put a very critical BX register at 0x22/0x23 - basically
#> the cyrix test turns off the bus arbitrators
#OK, I basically followed the algorithm that you outlined in another
#email:
#
#if has cpuid
# do cpuid
#else
# if cyrix 6x86(L)
# turn on cpuid/slop
# else
# do the 486/386 probe
#endif
Which is wrong. At least now, thanks to Intel's "ingenuity." *snort*
Apparently, the BX chipset was DESIGNED to behave like that, to inform the
computers that it's a "Genuine Intel" chipset. As if I gave a flying fsck;
the box I type this on is a VIA VXpro+, and my real workstation is
KR-859CF based. I don't want Intel. Anyways, back on topic. :)
The correct method at this point would be this...
turn on cpuid
if it works
if vendor == cyrix, amd, or centaur
do not probe for BX
else
probe 486/386
endif
This *WILL* fix any of these *STUPID* BX 'features' that break the
checking for other vendors CPUs. My only problem right now is actually
finding the time to hack together a patch against 2.0.33 and 2.1.103, so
we can take care of all of that.
#I also had to change a small detail in setup.c, so I am sending you the
#complete patch against a clean 2.0.33. It has:
#a) Correct identification of Cyrix 6x86(Classic, L and MX) CPU.
AFAIK, the only problem is with the Cx6x86 and Cx6x86L, which both have
cpuid disabled by default. Cx6x86MX and mII have shown no problems,
detecting correctly every time.
#b) Works around the oops in do_fast_gettimeoffset(). A _very_ neat
#time.c patch is in the works by C. Scott Ananian (cananian), but
#meanwhile a workaround is still better than an oops, IMHO.
Agreed entirely. :)
#c) Correctly identifies 6x86 steppings.
Now THAT is a feat. };)
#d) Does not clobber the BX chipset register.
Right now, that'll make do. As SOON as I can find the time to put together
a nice neat little BX fix, I will happily share.
#e) Correctly sets up the SLOP bit for 6x86(Classic, L) CPUs.
SLOP bit hasn't been a problem here. But, as always, YMMV. :)
#f) What else? Makes good coffee, shines your shoes, etc... :-)
iam:root @eiterra:/root# echo "brew" >> /dev/mr.coffee
;)
#BTW I have been told that the new Cyrix MII CPUs have the "Coma bug"
#fixed. More info on this as soon as I can get a part for tests.
Consider this confirmed. The mII *IS* a Cx6x86MX core, but with some MAJOR
changes. Among them includes the fixing of the Coma bug, as well as some
pretty big updates to VSPM, and the AEU. Can we PLEASE use VSPM actively
now? I *LIKE* the idea of addressing memory in 4G blocks. :)
-Phil R. Jaenke (kernel@nls.net / prj@nls.net)
TheGuyInCharge(tm), Ketyra Designs - We get paid to break stuff :)
Linux pkrea.ketyra.INT 2.0.33 #15 Sat Apr 18 00:40:21 EDT 1998 i586
Linux eiterra.nls.net 2.1.98 #15 Fri May 1 18:21:00 EDT 1998 i586
- Linus says for 'brave people only.' I say 'keep a backup.' - :)
! I reserve the right to bill spammers for my time and disk space !
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