Applied.
Btw, as far as I know, an ISA read will cost closer to 1 usec rather than
1/8 usec.
Yes, the ISA bus is 8MHz, but when you actually do a read that's not just
one bus cycle, even in theory it's at least two cycles (one to assert the
address, one to get the result), and in practice it seems to be noticeably
more.
Nitpickers will add to that the subtractive decoding of PCI->ISA, where
the ISA access will be initiated only after no PCI devices have tried to
answer, so you have something like three PCI cycles before the ISA
transaction will even be started. But compared to the ISA overhead itself
that's miniscule..
Linus
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