RE: AMD SMP

Vladimir Dergachev (vladimid@blue.seas.upenn.edu)
Sat, 5 Sep 1998 00:10:40 -0400 (EDT)

> in mind:
> Speed (achievable)
> SMP/ASMP/TANDEM processing (currently here)
> Heat dissipation (possible if chip size reduced ie removal of unneeded
> instructions)
>
> As a programmer, you can do everything that the MMX processor does with code
> and if the chip was 2 times faster you code would beat the MMX (30%)
> internal ability. If you removed MMX you could achieve that 2x speed.
>
> Remember, you could put a RISC chip into a microwave and would work but why
> would it need MMX.
>
> I could be wrong and probably and but this is just MHO.
>
> Gary Smith
> gw-smith@ix.netcom.com

This is approximately what exponential tried to do several years ago..
And(in part) what AMD is doing now.

exponential was trying to make a processor based on a more power-hungry
technology (the predicted power dissipation was 85W) and at that time the
clock was very high - 500mhz. The chip was meant to be RISC with outer
layer translating x86 instructions. It is interesting that the pipeling
was relatively simple as well as other aspects of design which means that
the speed could be improved further. Exponential went bunkrupt bc they
couldn't arrange with IBM and Motorola on some patents needed to
manufacture these things.

Amd K6 has a RISC core with outer layer translating x86 instructions..

Vladimir Dergachev

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