Not necessarily. Arbitration is done when the clock line is high and the
state of the data line is well defined. If the line state is different
from what you put on the bus (i.e. you wrote 1 and sda is 0, due to wired and
logic), you have to get lost.
So the only necessity is a delay between clock line going high & reading of
the data line that is small enough to be under the minimum bus timings ( ca.
4 us, if I remember correctly). An interrupt handler and the right hardware
should do the trick.
btw, it's all there in my driver, just commented out - arbitration doesn't
make much sense in a single-master environment anyway.
Simon
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