> Little/big endian is determined by hardware. It is not a software
> issue. Of course one could make a compiler put instructions in any
> order, the natural order will be the order in which instructions
> are fetched by the CPU from memory. Even if memory fetches are
> long-longs, you will have to use what the CPU expects.
Most RISC CPUs now have a mode flag that puts them in big or little endian
mode, so this is no longer true. Some even have a bit in the instruction
word which indicates whether to do a big-endian or little-endian load or
store.
Why? I'm going to speculate that Windows NT required it (for exactly the
same reason Linus demands it - for running x86 apps). Most of the current
RISC families started getting off the ground while NT 3.1 was in
development and everyone planned on having a port. The hardware to support
it is pretty minimal.
-- "Love the dolphins," she advised him. "Write by W.A.S.T.E.."
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