It's worse than that. A simple byte-at-a-time memcpy will work OK in some
predictable way, but optimised memcpy implementation will use a mixture of
byte, word and even cache line memory reads/writes depending on the CPU and
memory architecture. This will completely confuse the hardware byte-swizzler
and you end up with a complete mess.
The solution, I suppose, is to have memory instructions with always use a fixed
endianness, regardless of what the page endianness properties are, but "clean"
and "elegant" are long gone.
J
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