Intel (and possibly other) motherboard chipsets allow changing the area
between 0xc0000 and 0x100000 to cacheable ram. Look at their web site for
docs.
Warning: this is only useful and safe when the area is not used by ISA card
or dosemu etc!
For example, the registers of my Natoma bridge can be tweaked with command:
$ lspci | grep Host
00:00.0 Host bridge: Intel Corporation 440FX - 82441FX PMC [Natoma] (rev 02)
$ setpci -s 00:00.0 59.b=33 5a.w=3333 5c.l=33333333
I also wrote this module to give the memory to kernel (also thinkpad area).
-Topi
#include <linux/version.h>
#include <linux/config.h>
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/errno.h>
#include <linux/kernel.h>
#include <linux/mman.h>
#include <linux/mm.h>
#include <linux/init.h>
#include <linux/string.h>
#include <asm/page.h>
#include <asm/atomic.h>
int init_module(void)
{
unsigned long i;
for (i=0x9f000+PAGE_OFFSET; i < 0xa0000+PAGE_OFFSET; i+=PAGE_SIZE) {
clear_bit(PG_reserved, &mem_map[MAP_NR(i)].flags);
}
for (i=0xc0000+PAGE_OFFSET; i < 0x100000+PAGE_OFFSET; i+=PAGE_SIZE) {
clear_bit(PG_reserved, &mem_map[MAP_NR(i)].flags);
}
return -ENXIO;
}
-
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