Re: Q: PAGE_CACHE_SIZE?

Roger Gammans (rgammans@computer-surgery.co.uk)
Tue, 25 May 1999 09:21:07 +0100


In article <Pine.LNX.4.05.9905201904370.3038-100000@laser.random>,
Andrea Arcangeli <andrea@suse.de> writes
>On Tue, 18 May 1999, Andi Kleen wrote:
>
>>I guess the main motivation comes from the ARM port, where some versions
>>have PAGE_SIZE=32k.
>
>Since they have a too much large PAGE_SIZE, they shouldn't be interested
>in enalrging the page-cache-size.

Prolly, I'm not the expert on ARM26-linux, in fact I've never used it,
but IIRC all the ARM26 bit machines have 16MB[1], maximum memory size,
in the (chipset/MB) architecture.

Although They will not have less than 4MBytes and the memsize will be a
multiple of 4MBytes. I'm guessing here that multiple MEMCs with
different page sizes isn't going to work very well.

So I doubt that not enlarging page-cache size is a big issue.

[1] I'm think of the 240/540 here so it's actually going to be 8MB in
most cases.

-- 
Roger Gammans

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