You might want to benchmark the overhead of that. You have to
invalidate and be sure the other cpu invalidation is complete
before continuing. I don't doubt it can be way faster than intel,
but I doubt its that cheap.
Anyone have datasheet figures ?
Sure you can, if things are setup correctly, the CPU does the
invalidation at the first event at which it can take any trap, for
example on UltraSparc.
All the information needed to perform the flush is in the IRQ packet
itself, so it's atomic etc. As soon as you get a non-NAK from the cpu
on the sender side, you can act as if the flush arrived.
My point is that on some machines it is quite cheap to "be sure".
I have not overlooked the fact that avoiding the cross TLB flush is
important, because in fact even on UltraSparc I take great pains to
make sure it almost never happens.
Later,
David S. Miller
davem@redhat.com
-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.rutgers.edu
Please read the FAQ at http://www.tux.org/lkml/