On Fri, 03 Sep 1999 10:13:37 +0200, Manfred Spraul
<manfreds@colorfullife.com> said:
> "Stephen C. Tweedie" wrote:
>> Hi,
>> There are PCI controllers which ignore the high bit of the address
>> line. Their limit is 2GB. Above that they need bounce buffers. Sad
>> but true.
> 2 GB memory cost > $7000 (4* 512 Mb ECC memory)
> I think everyone who needs > 2 GB memory _and_ raw-io will buy a new
> controller instead of relying on bounce buffers, so I would not add them
> unless
> * the required code is really short [shorter than the 70 lines needed
> for swap]
It _is_ short. It is doing the same job that the swap code does. The
point is to avoid having to re-implement the swap code over and over
again, once for raw IO, once for the page cache --- better just to move
the existing mechanism into the general-purpose IO code.
Remember, too, that the user with 4G may still want to access the floppy
or CDRom devices at some point! If we have a himem-enabled page cache,
then these old devices may well require bounce buffers. When we
introduce support for 64G addressing, even today's scsi controllers will
need bounce buffers until all of the drivers are updated for DAC pci
addressing.
--Stephen
-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.rutgers.edu
Please read the FAQ at http://www.tux.org/lkml/