Which reminds me.
Let me know if this "cheap 63bit atomic increment" works...
Increment:
lock
addl $1,counter
jo 0f
jc 0f
.section .fixup,"ax"
0: incl counter+4
jmp 1f
.previous
1:
Read:
movl counter+4,%edx
lock
addl $0,(%esp)
movl counter,%eax
cmpl $0x80000000,%eax
adcl $0,%edx
shrl $1,%edx
Based on the observation that carry events are rare.
We can safely assume two never happen during the processor race windows.
enjoy,
-- Jamie
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