ordered memory access

Manfred Spraul (manfreds@colorfullife.com)
Thu, 30 Sep 1999 11:11:07 +0000

I try to thread ipc/msg.c. My new design is nearly finished, but I have
one problem:
In a certain case, I want to rely on memory ordering instead of a
spinlock:

struct test {
atomic_t a;
atomic_t b;
}
CPU1:
atomic_set(a,return_value);
atomic_set(b,1234);

CPU2:
if(atomic_read(b) == 1234)
return atomic_read(a);

IIRC, the x86 CPU can reorder read ahead of write, and atomic_read(),
atomic_set() are normal read/write operations, so is this code SMP safe?
Which memory barrier calls are required for portability?

--
	Manfred


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