>Aren't according to what architecture? Some architectures can only
Yes, but as we was talking about common code so you can't assume that you
are running on i386 (on i386 the lock on the bus alwyas enforce ordering).
>Intuitively I think it makes sense to do so, and I doubt it will be a
>performance hit at all, but I am just guessing here.
On alpha you'll avoid some mb/wmb additional asm instruction ;).
If you don't test atomically the retval it make no sense to me to enforce
ordering so the alpha implementation looks fine to me.
Andrea
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