I know this is true on Pentiums, but is it true on P6 class machines? I
would expect the `not [ebx]' to prefetch an entire cache line (possible
from nonexistent memory), and the push/pop would not force anything onto
the bus.
On a P6, even a locked memory operation does not necessarily cause bus
activity.
Perhaps `wbinvd' is required. The Intel manual says: "Write back and
flush internal caches; initiate write-back and flush of external
caches".
-- Jamie
-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.rutgers.edu
Please read the FAQ at http://www.tux.org/lkml/