here's the current implementation on parisc where we have _only_
load-and-zero, which must surely be the most primitive atomic op.
xchg:
spin_lock_irqsave(lock, flags);
temp = *ptr;
*ptr = x;
spin_unlock_irqrestore(lock, flags);
(unless you're xchg'ing with a constant zero, in which case we use the
primitive we have. Most of the xchg's in the kernel use this form.)
um. no-one's made the test_and_set_bit code atomic yet. But it's going
to suck worse than this. If the contention on the xchglock becomes too
great, we can hash on the value of `ptr' and have an array of locks.
ARM has load-and-store, which must be the next most primitive atomic op.
that makes xchg a no-brainer, but test-and-set-bit is quite hard.
I'm having trouble thinking of a design where xchg would be worse
than test-and-phi.
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