Re: spin_unlock optimization(i386)

Stefan Monnier (monnier+lists/linux/kernel/news/@tequila.cs.yale.edu)
24 Nov 1999 18:57:09 -0500

>>>>> "David" == David Wragg <dpw@doc.ic.ac.uk> writes:
> A couple of weeks ago, I went to a presentation about mutex
> optimisations. It included measurements of the cost of a mutex lock
> followed by unlock on Alpha, both with the usual
> load-locked/store-conditional with memory barrier sequence, and with
> the mutex code modified to use a load/store and no memory barriers
> sequence. I don't remember the exact figures, but:

How did they manage to write a l/s only mutex on an Alpha ?
Or was it UP only ?
The memory consistency of Alpha is very weak and requires (AFAIK)
a memory barrier to implement a mutex)

Stefan

PS: I do tend to think that a strong sequential consistency (even stronger
than x86's) is the way to go performancewise. Memory barriers are
just too expensive. Isn't MIPS sequentially consistent ?

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