Re: [Fwd: Dual Celery on BP6]

Aaron Holtzman (aholtzma@ess4.engr.UVic.CA)
Fri, 17 Dec 1999 21:33:59 -0800

It would seem that Mike Frisch (mfrisch@saturn.tlug.org) said:
> I am definitely not disputing this point, but it appears the even those
> who have changed the gree heatsink with something larger and lowered this
> chip temperature substantially are still experiencing the problem
> (overclocked or not). Are you of the opinion that this is entirely a heat
> problem?

There appears to be some correlation with APIC wackyness and higher
speed FSBs. I don't think this is necessarily a heat problem, but it
would be nice to remove some variables.

Note that the bp6 was probably only QA tested for 66 MHz and the
timing margins on the board at 100Mhz could be almost non existent.
I would be first in line to by a motherboard from a company that
put all of their link timing margins in the user manual.

cheers,
aaron

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