Re: Linux 2.6.30-rc8 [also: VIA Support]

[Harald Welte]

On Thu, Jun 04, 2009 at 11:21:28AM -0500, Michael S. Zick wrote:

> That is one of my pending questions - -
> (It is included as a comment at the appropriate point in my patchset.)
> 
> The VIA processors have MCR's not MTRR's - -

AFAIK, that was true for processors like the Winhcip / C6, i.e. earlier than
the C3.  The C3, C7 and later support 8 intel-style MTRR's.

> The C7-M processor uses "in-order retirement" not "out-of-order" - -
> I think the MCR's **should not** be set for "weak ordered writes" -

why would it matter on UP? as indicated, I'm not the expert here, but I thought
memory ordering issues only arise in SMP systems [or possibly with regard to
DMA, but as we already explored much earlier in this thread, drivers that access
DMA buffers whil the hardware owns them are buggy and need to be fixed]

Regards,
-- 
- Harald Welte <HaraldWelte@xxxxxxxxxxx>	    http://linux.via.com.tw/
============================================================================
VIA Free and Open Source Software Liaison
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