Re: [PATCH 4/4] x86, amd: Support L3 Cache Partitioning on AMDfamily 0x15 CPUs

From: Ingo Molnar
Date: Wed Jan 26 2011 - 05:56:51 EST



* Hans Rosenfeld <hans.rosenfeld@xxxxxxx> wrote:

> L3 Cache Partitioning allows selecting which of the 4 L3 subcaches can
> be used for evictions by the L2 cache of each compute unit. By writing a
> 4-bit hexadecimal mask into the the sysfs file /sys/devices/system/cpu/\
> cpuX/cache/index3/subcaches, the user can set the enabled subcaches for
> a CPU. The settings are directly read from and written to the hardware,
> so there is no way to have contradicting settings for two CPUs belonging
> to the same compute unit. Writing will always overwrite any previous
> setting for a compute unit.
>
> Signed-off-by: Hans Rosenfeld <hans.rosenfeld@xxxxxxx>
> ---
> arch/x86/include/asm/amd_nb.h | 3 +
> arch/x86/kernel/amd_nb.c | 55 +++++++++++++++++++++++++
> arch/x86/kernel/cpu/intel_cacheinfo.c | 73 +++++++++++++++++++++++++++-----
> 3 files changed, 119 insertions(+), 12 deletions(-)

I have picked up the other 3 patches, but this one causes this build failure:

arch/x86/kernel/amd_nb.c: In function âamd_get_subcachesâ:
arch/x86/kernel/amd_nb.c:129:36: error: âstruct cpuinfo_x86â has no member named âcompute_unit_idâ
arch/x86/kernel/amd_nb.c: In function âamd_set_subcachesâ:
arch/x86/kernel/amd_nb.c:154:28: error: âstruct cpuinfo_x86â has no member named âcompute_unit_idâ
arch/x86/kernel/amd_nb.c:155:36: error: âstruct cpuinfo_x86â has no member named âcompute_unit_idâ
arch/x86/kernel/amd_nb.c: In function âamd_get_subcachesâ:
arch/x86/kernel/amd_nb.c:130:1: warning: control reaches end of non-void function

Thanks,

Ingo
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