Re: [PATCH v2] x86/mrst: correct pin to irq mapping

[Ingo Molnar]

* Jacob Pan <jacob.jun.pan@xxxxxxxxxxxxxxx> wrote:

> As a result, apbt timer and RTC interrupts on Moorestown are within legacy
> IRQ range.
> 
> sh-3.2# cat /proc/interrupts
>            CPU0       CPU1
>   0:      11249          0   IO-APIC-edge      apbt0
>   1:          0      12271   IO-APIC-edge      apbt1
>   8:        887          0   IO-APIC-fasteoi   dw_spi
>  13:          0          0   IO-APIC-fasteoi   INTEL_MID_DMAC2
>  14:          0          0   IO-APIC-fasteoi   rtc0

Is there a 'before the patch' /proc/interrupts output as well? Supposedly it's 
different and seeing that different output is *way* more descriptive to the 
casual commit log reader than a textual explanation only.

Also, i guess this would be .40 material, right?

Thanks,

	Ingo
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