Re: [PATCH 3/3] arm64: dts: qcom: sm8250-asus-obiwan: Add ASUS ROG Phone 3

From: Dmitry Baryshkov

Date: Mon Mar 09 2026 - 16:37:02 EST


On Sun, Mar 08, 2026 at 08:40:44PM +0000, Alexander Koskovich wrote:
> Supported functionality as of this initial submission:
> * Armor Case & Dock Hall Sensors
> * Camera flash/torch LED
> * Display (Tianma TA066VVHM03)
> * DisplayPort Alt Mode
> * Macro Camera (OV8856)
> * GPU (Adreno 650)
> * NFC (NXP PN553)
> * Power Button, Volume Keys
> * Regulators
> * Remoteprocs (ADSP, CDSP, SLPI)
> * UFS
> * USB
> * Video Codec (Venus)
> * Wi-Fi / Bluetooth (QCA6390)
>
> Signed-off-by: Alexander Koskovich <akoskovich@xxxxx>
> ---
> arch/arm64/boot/dts/qcom/Makefile | 1 +
> arch/arm64/boot/dts/qcom/sm8250-asus-obiwan.dts | 1328 +++++++++++++++++++++++
> 2 files changed, 1329 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> index f80b5d9cf1e8..cca71c3884f6 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -307,6 +307,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sm8150-microsoft-surface-duo.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sm8150-mtp.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sm8150-sony-xperia-kumano-bahamut.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sm8150-sony-xperia-kumano-griffin.dtb
> +dtb-$(CONFIG_ARCH_QCOM) += sm8250-asus-obiwan.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sm8250-hdk.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sm8250-mtp.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sm8250-samsung-r8q.dtb
> diff --git a/arch/arm64/boot/dts/qcom/sm8250-asus-obiwan.dts b/arch/arm64/boot/dts/qcom/sm8250-asus-obiwan.dts
> new file mode 100644
> index 000000000000..e414e36e859a
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sm8250-asus-obiwan.dts
> @@ -0,0 +1,1328 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/arm/qcom,ids.h>
> +#include <dt-bindings/clock/qcom,camcc-sm8250.h>
> +#include <dt-bindings/leds/common.h>
> +#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
> +#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
> +#include <dt-bindings/usb/pd.h>
> +
> +#include "sm8250.dtsi"
> +#include "pm8150.dtsi" /* PM8250 */
> +#include "pm8150b.dtsi"
> +#include "pm8150l.dtsi"
> +
> +/delete-node/ &reserved_memory;

It's a nice approach, but typically boards just delete reserved memory
nodes one by one. There might be other reservables...

> +
> +/ {
> + model = "ASUS ROG Phone 3";
> + compatible = "asus,obiwan", "qcom,sm8250";
> + chassis-type = "handset";
> + qcom,board-id = <40 0>;
> + qcom,msm-id = <QCOM_ID_SM8250 0x20001>;
> +
> + aliases {
> + serial0 = &uart12;
> + serial1 = &uart6;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + battery: battery {
> + compatible = "simple-battery";
> + voltage-min-design-microvolt = <3400000>;
> + voltage-max-design-microvolt = <4360000>;
> + charge-full-design-microamp-hours = <5800000>;
> + charge-term-current-microamp = <200000>;
> + constant-charge-current-max-microamp = <2750000>;
> + constant-charge-voltage-max-microvolt = <4360000>;
> + };
> +
> + gpio_keys: gpio-keys {
> + compatible = "gpio-keys";
> +
> + pinctrl-0 = <&volume_up_default>, <&hall_sensors_default>;
> + pinctrl-names = "default";
> +
> + event-hall-sensor-case {
> + label = "Hall Effect Sensor (Armor Case)";
> + gpios = <&tlmm 113 GPIO_ACTIVE_LOW>;
> + linux,input-type = <EV_SW>;
> + linux,code = <SW_MACHINE_COVER>;
> + linux,can-disable;
> + wakeup-source;
> + };
> +
> + event-hall-sensor-dock {
> + label = "Hall Effect Sensor (Dock)";
> + gpios = <&tlmm 121 GPIO_ACTIVE_LOW>;
> + linux,input-type = <EV_SW>;
> + linux,code = <SW_DOCK>;
> + linux,can-disable;
> + wakeup-source;
> + };
> +
> + key-vol-up {
> + label = "Volume Up";
> + gpios = <&pm8150_gpios 6 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_VOLUMEUP>;
> + debounce-interval = <15>;
> + linux,can-disable;
> + wakeup-source;
> + };
> + };
> +
> + qca6390-pmu {
> + compatible = "qcom,qca6390-pmu";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&bt_en_default>, <&wlan_en_default>;
> +
> + vddaon-supply = <&vreg_s6a>;
> + vddpmu-supply = <&vreg_s6a>;
> + vddrfa0p95-supply = <&vreg_s6a>;
> + vddrfa1p3-supply = <&vreg_s8c>;
> + vddrfa1p9-supply = <&vreg_s5a>;
> + vddpcie1p3-supply = <&vreg_s8c>;
> + vddpcie1p9-supply = <&vreg_s5a>;
> + vddio-supply = <&vreg_s4a>;
> +
> + wlan-enable-gpios = <&tlmm 20 GPIO_ACTIVE_HIGH>;
> + bt-enable-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
> +
> + regulators {
> + vreg_pmu_rfa_cmn: ldo0 {
> + regulator-name = "vreg_pmu_rfa_cmn";
> + };
> +
> + vreg_pmu_aon_0p59: ldo1 {
> + regulator-name = "vreg_pmu_aon_0p59";
> + };
> +
> + vreg_pmu_wlcx_0p8: ldo2 {
> + regulator-name = "vreg_pmu_wlcx_0p8";
> + };
> +
> + vreg_pmu_wlmx_0p85: ldo3 {
> + regulator-name = "vreg_pmu_wlmx_0p85";
> + };
> +
> + vreg_pmu_btcmx_0p85: ldo4 {
> + regulator-name = "vreg_pmu_btcmx_0p85";
> + };
> +
> + vreg_pmu_rfa_0p8: ldo5 {
> + regulator-name = "vreg_pmu_rfa_0p8";
> + };
> +
> + vreg_pmu_rfa_1p2: ldo6 {
> + regulator-name = "vreg_pmu_rfa_1p2";
> + };
> +
> + vreg_pmu_rfa_1p7: ldo7 {
> + regulator-name = "vreg_pmu_rfa_1p7";
> + };
> +
> + vreg_pmu_pcie_0p9: ldo8 {
> + regulator-name = "vreg_pmu_pcie_0p9";
> + };
> +
> + vreg_pmu_pcie_1p8: ldo9 {
> + regulator-name = "vreg_pmu_pcie_1p8";
> + };
> + };
> + };
> +
> + reserved_memory: reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + hyp_mem: memory@80000000 {
> + reg = <0x0 0x80000000 0x0 0x600000>;
> + no-map;
> + };
> +
> + xbl_aop_mem: memory@80700000 {
> + reg = <0x0 0x80700000 0x0 0x160000>;
> + no-map;
> + };
> +
> + cmd_db: memory@80860000 {
> + compatible = "qcom,cmd-db";
> + reg = <0x0 0x80860000 0x0 0x20000>;
> + no-map;
> + };
> +
> + smem_mem: memory@80900000 {
> + reg = <0x0 0x80900000 0x0 0x200000>;
> + no-map;
> + };
> +
> + removed_mem: memory@80b00000 {
> + reg = <0x0 0x80b00000 0x0 0xb200000>;
> + no-map;
> + };
> +
> + camera_mem: memory@8bf00000 {
> + reg = <0x0 0x8bf00000 0x0 0x500000>;
> + no-map;
> + };
> +
> + wlan_mem: memory@8c400000 {
> + reg = <0x0 0x8c400000 0x0 0x100000>;
> + no-map;
> + };
> +
> + ipa_fw_mem: memory@8c500000 {
> + reg = <0x0 0x8c500000 0x0 0x10000>;
> + no-map;
> + };
> +
> + ipa_gsi_mem: memory@8c510000 {
> + reg = <0x0 0x8c510000 0x0 0xa000>;
> + no-map;
> + };
> +
> + gpu_mem: memory@8c51a000 {
> + reg = <0x0 0x8c51a000 0x0 0x2000>;
> + no-map;
> + };
> +
> + npu_mem: memory@8c600000 {
> + reg = <0x0 0x8c600000 0x0 0x500000>;
> + no-map;
> + };
> +
> + video_mem: memory@8cb00000 {
> + reg = <0x0 0x8cb00000 0x0 0x500000>;
> + no-map;
> + };
> +
> + cvp_mem: memory@8d000000 {
> + reg = <0x0 0x8d000000 0x0 0x500000>;
> + no-map;
> + };
> +
> + cdsp_mem: memory@8d500000 {
> + reg = <0x0 0x8d500000 0x0 0x1400000>;
> + no-map;
> + };
> +
> + slpi_mem: memory@8e900000 {
> + reg = <0x0 0x8e900000 0x0 0x1500000>;
> + no-map;
> + };
> +
> + adsp_mem: memory@8fe00000 {
> + reg = <0x0 0x8fe00000 0x0 0x1d00000>;
> + no-map;
> + };
> +
> + spss_mem: memory@92300000 {
> + reg = <0x0 0x92300000 0x0 0x100000>;
> + no-map;
> + };
> +
> + cdsp_secure_heap: memory@92400000 {
> + reg = <0x0 0x92400000 0x0 0x4600000>;
> + no-map;
> + };
> +
> + ramoops: ramoops@96a00000 {
> + compatible = "ramoops";
> + reg = <0x0 0x96a00000 0x0 0x400000>;
> + console-size = <0x200000>;
> + pmsg-size = <0x200000>;
> + ecc-size = <16>;
> + };
> +
> + asus_debug_mem: memory@97000000 {
> + reg = <0x0 0x97000000 0x0 0x400000>;
> + no-map;
> + };
> + };
> +
> + vph_pwr: vph-pwr-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vph_pwr";
> + regulator-min-microvolt = <3700000>;
> + regulator-max-microvolt = <3700000>;
> + };
> +
> + vreg_cam_dvdd_1p2: cam-dvdd-1p2-regulator {

I understand your wish to group the regulator devices, however then
please rename the nodes to have a similar name (e.g. regulator-foo-bar).
Also please place them correspondingly ('qcm6390' < 'regulator' <
'reserved').

> + compatible = "regulator-fixed";
> + regulator-name = "vreg_cam_dvdd_1p2";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + regulator-enable-ramp-delay = <233>;
> + gpio = <&pm8150l_gpios 3 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> + };
> +


> +
> +&cpu7_opp_table {
> + cpu7_opp21: opp-3091200000 {
> + opp-hz = /bits/ 64 <3091200000>;
> + opp-peak-kBps = <8368000 51609600>;
> + };

I'm a bit concerned about this one, I haven't seen it in the downtream
SM8250 DT.

> +};
> +
> +
> +&gpu {
> + status = "okay";
> +
> + zap-shader {
> + memory-region = <&gpu_mem>;

&gpu_zap_shader {
};

> + firmware-name = "qcom/sm8250/asus/obiwan/a650_zap.mbn";
> + };
> +};
> +
> +
> +&i2c15 {
> + status = "okay";
> +
> + typec@4e {
> + compatible = "richtek,rt1715";
> + reg = <0x4e>;
> + interrupts-extended = <&tlmm 175 IRQ_TYPE_LEVEL_LOW>;
> + vbus-supply = <&vreg_rt1715_vbus>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&rt1715_irq_default>;
> +
> + connector {
> + compatible = "usb-c-connector";
> + power-role = "dual";
> + data-role = "dual";
> + try-power-role = "sink";
> + self-powered;
> + op-sink-microwatt = <10000000>;
> +
> + source-pdos = <PDO_FIXED(5000, 500,
> + PDO_FIXED_DUAL_ROLE |
> + PDO_FIXED_USB_COMM |
> + PDO_FIXED_DATA_SWAP)>;
> +
> + sink-pdos = <PDO_FIXED(5000, 3000,
> + PDO_FIXED_DUAL_ROLE |
> + PDO_FIXED_USB_COMM |
> + PDO_FIXED_DATA_SWAP)
> + PDO_FIXED(9000, 2000, 0)>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + rt1715_con_hs: endpoint {
> + remote-endpoint = <&usb_2_dwc3_hs_out>;
> + };

Just HS, no USB 3.0 support?

> + };
> + };
> + };
> + };
> +
> +&mdss_dp {
> + status = "okay";
> +};
> +
> +&mdss_dp_out {
> + data-lanes = <0 1>;
> + remote-endpoint = <&usb_1_qmpphy_dp_in>;

Please move endpoint connection to sm8250.dtsi.

> +};
> +
> +&mdss_dsi0 {
> + vdda-supply = <&vreg_l9a>;
> +
> + status = "okay";
> +
> + panel@0 {
> + compatible = "tianma,ta066vvhm03";
> + reg = <0>;
> +
> + enable-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
> + reset-gpios = <&tlmm 75 GPIO_ACTIVE_LOW>;
> +
> + vci-supply = <&vreg_l10a>;
> + vdd-supply = <&vreg_l3c>;
> + vddio-supply = <&vreg_l14a>;
> +
> + pinctrl-0 = <&disp_en_active>, <&disp_reset_n_active>, <&mdp_vsync>;
> + pinctrl-1 = <&disp_en_suspend>, <&disp_reset_n_suspend>, <&mdp_vsync>;
> + pinctrl-names = "default", "sleep";
> +
> + port {
> + panel_in: endpoint {
> + remote-endpoint = <&mdss_dsi0_out>;
> + };
> + };
> + };
> +};
> +
> +&mdss_dsi0_out {
> + data-lanes = <0 1 2 3>;
> + remote-endpoint = <&panel_in>;
> +};
> +
> +&mdss_dsi0_phy {
> + vdds-supply = <&vreg_l5a>;
> +
> + status = "okay";
> +};
> +
> +&pcie0 {
> + status = "okay";
> +};
> +
> +&pcie0_phy {
> + vdda-phy-supply = <&vreg_l5a>;
> + vdda-pll-supply = <&vreg_l9a>;
> +
> + status = "okay";
> +};
> +
> +&pcieport0 {
> + wifi@0 {
> + compatible = "pci17cb,1101";
> + reg = <0x10000 0x0 0x0 0x0 0x0>;
> +
> + vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
> + vddaon-supply = <&vreg_pmu_aon_0p59>;
> + vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
> + vddwlmx-supply = <&vreg_pmu_wlmx_0p85>;
> + vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
> + vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
> + vddrfa1p7-supply = <&vreg_pmu_rfa_1p7>;
> + vddpcie0p9-supply = <&vreg_pmu_pcie_0p9>;
> + vddpcie1p8-supply = <&vreg_pmu_pcie_1p8>;
> +
> + qcom,calibration-variant = "ASUS_ROG_Phone_3";

Just to check, was it submitted upstream?

> + };
> +};
> +
> +
> +
> +&usb_1_dwc3 {
> + dr_mode = "otg";

This is default and can be dropped

> + usb-role-switch;

Please move to sm8250.dtsi.

> +};
> +
> +&usb_1_dwc3_hs_out {
> + remote-endpoint = <&pm8150b_hs>;
> +};
> +
> +&usb_1_hsphy {
> + vdda-pll-supply = <&vreg_l5a>;
> + vdda18-supply = <&vreg_l12a>;
> + vdda33-supply = <&vreg_l2a>;
> +
> + qcom,hs-disconnect-bp = <973>;
> + qcom,hs-amplitude-bp = <1110>;
> + qcom,pre-emphasis-amplitude-bp = <10000>;
> +
> + status = "okay";
> +};
> +
> +&usb_1_qmpphy {
> + mode-switch;
> + orientation-switch;

Please move to sm8250.dtsi.

> +
> + vdda-phy-supply = <&vreg_l9a>;
> + vdda-pll-supply = <&vreg_l18a>;
> +
> + status = "okay";
> +};
> +
> +&usb_1_qmpphy_dp_in {
> + remote-endpoint = <&mdss_dp_out>;

sm8250.dtsi.

> +};
> +
> +&usb_1_qmpphy_out {
> + remote-endpoint = <&pm8150b_ss>;
> +};
> +
> +&usb_2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&rt1715_mux_en>;
> +
> + /* Disable USB3 clock requirement as this port only supports USB2 */
> + qcom,select-utmi-as-pipe-clk;

OKay, this answers my earlier question.

> +
> + status = "okay";
> +};
> +
> +&usb_2_dwc3 {
> + dr_mode = "otg";

Default, can be dropped.

> + maximum-speed = "high-speed";
> + phys = <&usb_2_hsphy>;
> + phy-names = "usb2-phy";
> + usb-role-switch;

usb-role-switch can go to sm8250.dtsi.

> +
> + port {
> + usb_2_dwc3_hs_out: endpoint {
> + remote-endpoint = <&rt1715_con_hs>;
> + };
> + };
> +};
> +
> +&usb_2_hsphy {
> + vdda-pll-supply = <&vreg_l5a>;
> + vdda18-supply = <&vreg_l12a>;
> + vdda33-supply = <&vreg_l2a>;
> +
> + qcom,hs-disconnect-bp = <1332>;
> + qcom,hs-amplitude-bp = <2000>;
> + qcom,pre-emphasis-amplitude-bp = <20000>;
> +
> + status = "okay";
> +};
> +
> +&venus {
> + firmware-name = "qcom/sm8250/asus/obiwan/venus.mbn";
> +
> + status = "okay";
> +};
>
> --
> 2.53.0
>
>

--
With best wishes
Dmitry