RE: [PATCH v4 4/9] irqchip/renesas-rzg2l: Drop IRQC_NUM_IRQ macro

[Biju Das]

Hi Thomas Gleixner,

Thanks for the feedback.

> -----Original Message-----
> From: Thomas Gleixner <tglx@xxxxxxxxxx>
> Sent: 11 March 2026 09:07
> Subject: Re: [PATCH v4 4/9] irqchip/renesas-rzg2l: Drop IRQC_NUM_IRQ macro
> 
> On Fri, Feb 27 2026 at 14:03, Biju wrote:
> > @@ -136,7 +145,7 @@ static void rzg2l_irqc_eoi(struct irq_data *d)
> >  	raw_spin_lock(&priv->lock);
> >  	if (hw_irq >= IRQC_IRQ_START && hw_irq <= IRQC_IRQ_COUNT)
> >  		rzg2l_clear_irq_int(priv, hw_irq);
> > -	else if (hw_irq >= IRQC_TINT_START && hw_irq < IRQC_NUM_IRQ)
> > +	else if (hw_irq >= IRQC_TINT_START && hw_irq < priv->info.num_irq)
> >  		rzg2l_clear_tint_int(priv, hw_irq);
> 
> As I pointed out in the review of the RZV2H driver:
> 
>    https://lore.kernel.org/all/87ecmavbs0.ffs@tglx/
> 
> this really begs for separate interrupt chips so that the decision is made at setup time and not at
> every interrupt delivery in the hotpath.
> 
> Aren't you guys working together?

I have seen that comment. I agree, it is cleaner solution.

Thought of optimizing later after adding support for RZ/G3L??

Will investigate switching to separate interrupt chips.

Cheers,
Biju