[PATCH v2 11/11] clk: qcom: camcc-sc8180x: Refactor to use qcom_cc_driver_data
From: Val Packett
Date: Thu Mar 12 2026 - 07:25:59 EST
Use a qcom_cc_driver_data struct instead of a long custom probe
callback to align with modern qcom/gcc-*.c style.
No functional change intended.
Signed-off-by: Val Packett <val@xxxxxxxxxxxx>
---
drivers/clk/qcom/camcc-sc8180x.c | 67 +++++++++++++++-----------------
1 file changed, 32 insertions(+), 35 deletions(-)
diff --git a/drivers/clk/qcom/camcc-sc8180x.c b/drivers/clk/qcom/camcc-sc8180x.c
index 67b2055bd212..bbd7add69cb0 100644
--- a/drivers/clk/qcom/camcc-sc8180x.c
+++ b/drivers/clk/qcom/camcc-sc8180x.c
@@ -7,7 +7,6 @@
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/platform_device.h>
-#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <dt-bindings/clock/qcom,sc8180x-camcc.h>
@@ -63,6 +62,7 @@ static const struct alpha_pll_config cam_cc_pll0_config = {
static struct clk_alpha_pll cam_cc_pll0 = {
.offset = 0x0,
+ .config = &cam_cc_pll0_config,
.vco_table = trion_vco,
.num_vco = ARRAY_SIZE(trion_vco),
.regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_TRION],
@@ -138,6 +138,7 @@ static const struct alpha_pll_config cam_cc_pll1_config = {
static struct clk_alpha_pll cam_cc_pll1 = {
.offset = 0x1000,
+ .config = &cam_cc_pll1_config,
.vco_table = trion_vco,
.num_vco = ARRAY_SIZE(trion_vco),
.regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_TRION],
@@ -167,6 +168,7 @@ static const struct alpha_pll_config cam_cc_pll2_config = {
static struct clk_alpha_pll cam_cc_pll2 = {
.offset = 0x2000,
+ .config = &cam_cc_pll2_config,
.vco_table = regera_vco,
.num_vco = ARRAY_SIZE(regera_vco),
.regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_REGERA],
@@ -219,6 +221,7 @@ static const struct alpha_pll_config cam_cc_pll3_config = {
static struct clk_alpha_pll cam_cc_pll3 = {
.offset = 0x3000,
+ .config = &cam_cc_pll3_config,
.vco_table = trion_vco,
.num_vco = ARRAY_SIZE(trion_vco),
.regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_TRION],
@@ -248,6 +251,7 @@ static const struct alpha_pll_config cam_cc_pll4_config = {
static struct clk_alpha_pll cam_cc_pll4 = {
.offset = 0x4000,
+ .config = &cam_cc_pll4_config,
.vco_table = trion_vco,
.num_vco = ARRAY_SIZE(trion_vco),
.regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_TRION],
@@ -277,6 +281,7 @@ static const struct alpha_pll_config cam_cc_pll5_config = {
static struct clk_alpha_pll cam_cc_pll5 = {
.offset = 0x4078,
+ .config = &cam_cc_pll5_config,
.vco_table = trion_vco,
.num_vco = ARRAY_SIZE(trion_vco),
.regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_TRION],
@@ -306,6 +311,7 @@ static const struct alpha_pll_config cam_cc_pll6_config = {
static struct clk_alpha_pll cam_cc_pll6 = {
.offset = 0x40f0,
+ .config = &cam_cc_pll6_config,
.vco_table = trion_vco,
.num_vco = ARRAY_SIZE(trion_vco),
.regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_TRION],
@@ -2810,6 +2816,21 @@ static const struct qcom_reset_map cam_cc_sc8180x_resets[] = {
[CAM_CC_MCLK7_BCR] = { 0x50e0 },
};
+static struct clk_alpha_pll *cam_cc_sc8180x_plls[] = {
+ &cam_cc_pll0,
+ &cam_cc_pll1,
+ &cam_cc_pll2,
+ &cam_cc_pll3,
+ &cam_cc_pll4,
+ &cam_cc_pll5,
+ &cam_cc_pll6,
+};
+
+static u32 cam_cc_sc8180x_critical_cbcrs[] = {
+ 0xc1e4, /* CAM_CC_GDSC_CLK */
+ 0xc200, /* CAM_CC_SLEEP_CLK */
+};
+
static const struct regmap_config cam_cc_sc8180x_regmap_config = {
.reg_bits = 32,
.reg_stride = 4,
@@ -2818,6 +2839,13 @@ static const struct regmap_config cam_cc_sc8180x_regmap_config = {
.fast_io = true,
};
+static struct qcom_cc_driver_data cam_cc_sc8180x_driver_data = {
+ .alpha_plls = cam_cc_sc8180x_plls,
+ .num_alpha_plls = ARRAY_SIZE(cam_cc_sc8180x_plls),
+ .clk_cbcrs = cam_cc_sc8180x_critical_cbcrs,
+ .num_clk_cbcrs = ARRAY_SIZE(cam_cc_sc8180x_critical_cbcrs),
+};
+
static const struct qcom_cc_desc cam_cc_sc8180x_desc = {
.config = &cam_cc_sc8180x_regmap_config,
.clks = cam_cc_sc8180x_clocks,
@@ -2826,6 +2854,8 @@ static const struct qcom_cc_desc cam_cc_sc8180x_desc = {
.num_resets = ARRAY_SIZE(cam_cc_sc8180x_resets),
.gdscs = cam_cc_sc8180x_gdscs,
.num_gdscs = ARRAY_SIZE(cam_cc_sc8180x_gdscs),
+ .use_rpm = true,
+ .driver_data = &cam_cc_sc8180x_driver_data,
};
static const struct of_device_id cam_cc_sc8180x_match_table[] = {
@@ -2836,40 +2866,7 @@ MODULE_DEVICE_TABLE(of, cam_cc_sc8180x_match_table);
static int cam_cc_sc8180x_probe(struct platform_device *pdev)
{
- struct regmap *regmap;
- int ret;
-
- ret = devm_pm_runtime_enable(&pdev->dev);
- if (ret)
- return ret;
-
- ret = pm_runtime_resume_and_get(&pdev->dev);
- if (ret)
- return ret;
-
- regmap = qcom_cc_map(pdev, &cam_cc_sc8180x_desc);
- if (IS_ERR(regmap)) {
- pm_runtime_put(&pdev->dev);
- return PTR_ERR(regmap);
- }
-
- clk_trion_pll_configure(&cam_cc_pll0, regmap, &cam_cc_pll0_config);
- clk_trion_pll_configure(&cam_cc_pll1, regmap, &cam_cc_pll1_config);
- clk_regera_pll_configure(&cam_cc_pll2, regmap, &cam_cc_pll2_config);
- clk_trion_pll_configure(&cam_cc_pll3, regmap, &cam_cc_pll3_config);
- clk_trion_pll_configure(&cam_cc_pll4, regmap, &cam_cc_pll4_config);
- clk_trion_pll_configure(&cam_cc_pll5, regmap, &cam_cc_pll5_config);
- clk_trion_pll_configure(&cam_cc_pll6, regmap, &cam_cc_pll6_config);
-
- /* Keep some clocks always enabled */
- qcom_branch_set_clk_en(regmap, 0xc1e4); /* CAM_CC_GDSC_CLK */
- qcom_branch_set_clk_en(regmap, 0xc200); /* CAM_CC_SLEEP_CLK */
-
- ret = qcom_cc_really_probe(&pdev->dev, &cam_cc_sc8180x_desc, regmap);
-
- pm_runtime_put(&pdev->dev);
-
- return ret;
+ return qcom_cc_probe(pdev, &cam_cc_sc8180x_desc);
}
static struct platform_driver cam_cc_sc8180x_driver = {
--
2.52.0