RE: [PATCH v5 3/9] clk: renesas: r9a07g04{3,4}/r9a08g045-cpg: Add critical reset entries
From: Biju Das
Date: Wed Mar 18 2026 - 13:10:26 EST
Hi Geert,
Thanks for the feedback.
> -----Original Message-----
> From: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>
> Sent: 18 March 2026 15:01
> Subject: Re: [PATCH v5 3/9] clk: renesas: r9a07g04{3,4}/r9a08g045-cpg: Add critical reset entries
>
> Hi Biju,
>
> On Wed, 18 Mar 2026 at 09:42, Biju <biju.das.au@xxxxxxxxx> wrote:
> > From: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> >
> > The RZ/G2L SoC family requires DMA resets to be deasserted for routing
> > some peripheral interrupts to the CPU. Asserting these resets after
> > boot would silently break interrupt delivery with no driver to restore them.
> >
> > Mark the DMA resets as critical by adding them to the crit_resets
> > table in the SoC-specific rzg2l_cpg_info for r9a07g043, r9a07g044, and
> > r9a08g045, preventing __rzg2l_cpg_assert() from asserting them and
> > ensuring they are deasserted during probe and resume.
> >
> > Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
>
> Thanks for your patch!
>
> > --- a/drivers/clk/renesas/r9a07g043-cpg.c
> > +++ b/drivers/clk/renesas/r9a07g043-cpg.c
> > @@ -379,6 +379,11 @@ static const unsigned int r9a07g043_crit_mod_clks[] __initconst = {
> > MOD_CLK_BASE + R9A07G043_DMAC_ACLK, };
> >
> > +static const unsigned int r9a07g043_critical_resets[] = {
>
> "r9a07g043_crit_resets", for consistency with ".crit_resets" (everywhere).
Agreed. Will fix this in next version.
Cheers,
Biju