Re: [PATCH v4 5/7] pinctrl: renesas: rzg2l: Add support for RZ/G3L SoC

[Geert Uytterhoeven]

On Thu, 30 Apr 2026 at 11:34, Biju <biju.das.au@xxxxxxxxx> wrote:
> From: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
>
> Add pinctrl driver support for RZ/G3L SoC.
>
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> ---
> v3->v4:
>  * Dropped extra white spaces in SD0_CLK and SD0_DATA0 entries.
>  * Renamed SD0_DATA* → SD0_DAT* to match the pin function spreadsheet.
>  * Renamed SCIF_{RXD,TXD} → SCIF0_{RXD,TXD} to match the pin function
>    spreadsheet.
>  * .pin_to_oen_bit = rzg2l_pin_to_oen_bit() and dropped oen_max_port from
>    rzg3l_hwcfg.

Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
i.e. will queue in renesas-pinctrl for v7.2.

Gr{oetje,eeting}s,

                        Geert


--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds