Re: [PATCH net-next 10/12] net: stmmac: tc956x: add TC956x/QPS615 support

[Xilin Wu]

On 5/6/2026 11:39 PM, Daniel Thompson wrote:
> On Wed, May 06, 2026 at 10:35:18PM +0800, Xilin Wu wrote:
> > On 5/6/2026 10:19 PM, Andrew Lunn wrote:
> > > On Wed, May 06, 2026 at 08:59:01PM +0800, Xilin Wu wrote:
> > > > On 5/1/2026 11:54 PM, Alex Elder wrote:
> > > > > +	/* AXI Configuration */
> > > > > +	axi = &td->axi;
> > > > > +	axi->axi_lpi_en = 1;
> > > > > +	axi->axi_wr_osr_lmt = 31;
> > > > > +	axi->axi_rd_osr_lmt = 31;
> > > > > +	/* All sizes (2^2..2^8) are supported */
> > > > > +	axi->axi_blen_regval = DMA_AXI_BLEN_MASK;
> > > > > +	plat->axi = axi;
> > > > > +
> > > > > +	plat->mac_port_sel_speed = speed;
> > > > > +	plat->flags = STMMAC_FLAG_MULTI_MSI_EN | STMMAC_FLAG_TSO_EN;
> > > >
> > > > I got WoL working only after adding STMMAC_FLAG_USE_PHY_WOL here. I guess
> > > > it's required, since the driver clocks down the MAC/PMA/XPCS in its suspend
> > > > hook?
> > >
> > > Nice to see somebody testing WoL.
> > >
> > > In your testing, is it the PHY doing the WoL, or the MAC? I assume
> > > PHY.
> > >
> > > If i remember the DT correctly, the PHY interrupt is connected to a
> > > SoC GPIO, not a GPIO of this chip. So for your board, it is the SoCs
> > > GPIO controllers ability to perform the wake which is
> > > important. However, where the PHY interrupt is connected is a board
> > > design issue. Could the PHY interrupt be connected to the chip? Would
> > > the chip be able to wake the system? Should STMMAC_FLAG_USE_PHY_WOL be
> > > conditional?
> >
> > Yes, the PHY is doing the WoL. And I guess this makes sense as it allows the
> > MAC to power down during suspend to save power.
> >
> > The INTN pin of QCA8081 is connected to the ETH_0_INT_N of QPS615. And the
> > INTN_WOL pin is connected to a SoC GPIO.
>
> Interesting. That is different to RB3gen2 where INTN is routed to both
> (although there is a do-not-fit 0ohm resistor option that could change
> that).
>
> Does that mean you don't get phy interrupts reported in /proc/interrupts
> before any suspend happens?

No. The phy works in polling mode AFAIK.

> > Without this change, I can't get WoL to work. I have a working branch for
> > our board here:
> > https://github.com/strongtz/linux-radxa-qcom/commits/v7.0.2-8280-wip/
>
> I took a quick look at the DT and I noticed you have an SGMII PHY
> attached to both eMAC0 and eMAC1 on your board. This is something we
> think should work but were unable to test. Are you able to use both
> eMACs concurrently? Would be great to see that confirmed!
>
>
> Daniel.

Yes, both eMACs can be used concurrently. And they can reach 2.5Gbps 
under iperf3 testing.

--
Best regards,
Xilin Wu <sophon@xxxxxxxxx>