Re: [PATCH v2 1/8] PCI: Add pcie_wait_after_link_train() helper

[Hans Zhang]

On 5/6/26 23:55, Manivannan Sadhasivam wrote:
> On Wed, May 06, 2026 at 11:23:39PM +0800, Hans Zhang wrote:
> > PCIe r6.0, sec 6.6.1 (Conventional Reset) requires that for a Downstream
> > Port supporting Link speeds greater than 5.0 GT/s, software must wait a
> > minimum of 100 ms after Link training completes before sending any
> > Configuration Request.
> >
> > Introduce a static inline helper pcie_wait_after_link_train() that checks
> > the given max_link_speed (2 = 5.0 GT/s, 3 = 8.0 GT/s, etc.) and calls
> > msleep(100) only when the speed is greater than 5.0 GT/s. The helper uses
> > the existing PCIE_RESET_CONFIG_WAIT_MS macro defined in pci.h.
> >
> > This allows multiple host controller drivers to share the same mandatory
> > delay without duplicating the logic.
> >
> > Signed-off-by: Hans Zhang <18255117159@xxxxxxx>
> > ---
> >   drivers/pci/pci.h | 13 +++++++++++++
> >   1 file changed, 13 insertions(+)
> >
> > diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
> > index 4a14f88e543a..a8705a2a2d85 100644
> > --- a/drivers/pci/pci.h
> > +++ b/drivers/pci/pci.h
>
> Since this helper is for host controller drivers, this needs to be defined in
> pci-host-common.h.

Hi Mani,

Thank you very much for your reply and suggestions.

Will change.

> > @@ -60,6 +60,19 @@ struct pcie_tlp_log;
> >    */
> >   #define PCIE_RESET_CONFIG_WAIT_MS	100
> >   
> > +/**
> > + * pcie_wait_after_link_train - Wait 100 ms if link speed > 5 GT/s
> > + * @max_link_speed: the maximum link speed (2 = 5.0 GT/s, 3 = 8.0 GT/s, ...)
> > + *
> > + * Must be called after Link training completes and before the first
> > + * Configuration Request is sent.
> > + */
> > +static inline void pcie_wait_after_link_train(int max_link_speed)
>
> pci_host_common_link_train_delay()?

I think it's really great. Thanks.

Best regards,
Hans

> - Mani