Re: [PATCH 2/3] riscv: dts: spacemit: k1: Split gmac_clk_ref into independent pinctrl groups
From: Junhui Liu
Date: Tue May 26 2026 - 05:27:00 EST
Hi Yixun,
On Tue May 26, 2026 at 12:48 PM CST, Yixun Lan wrote:
> Hi Junhui,
>
> On 18:01 Fri 22 May , Junhui Liu wrote:
>> The gmac_clk_ref signal is optional for the GMAC controller and is not
>> strictly required for all hardware designs. In several already
>> upstreamed K1 boards, this signal remains unconnected or the
>> corresponding resistor is marked as NC.
>>
> I've not checked all exist boards which already accepted by mainline,
> but just ask, to be sure, none of them actually used clk ref pin?
> otherwise we will result with a broken GMAC/Ethernet driver..
I've checked the schematics of the already mainlined boards where the
schematics are publicly available. All of them use on-board 25 MHz
crystals for the GMAC PHYs, and the GMAC clk ref pins are either left
unconnected or routed only through NC/0R option resistors.
I could not find the schematic for the OrangePi R2S. However, the
board picture [1] shows on-board 25 MHz crystals near the Ethernet
PHY area.
To avoid changing the existing pinmux behavior unnecessarily, I think
it is safer to keep referencing the gmac*_clk_ref_cfg groups on BPI-F3,
Jupiter and MusePi Pro. On these boards, the pins are physically routed
to the PHY through NC/0R option resistors and cannot be repurposed
for other functions anyway. Keeping this configuration preserves the
previous behavior and ensures the optional hardware path remains usable
if those option resistors are populated.
For OrangePi R2S, since I could not verify the schematic, I will also
keep the clk-ref groups to preserve the previous behavior. I will only
omit the clk-ref groups on OrangePi RV2 and BPI-CM6, where the pins are
not connected to the PHY refclk path and are used for other purposes.
I will update this in v2.
[1] http://www.orangepi.org/img/r2s/details/1.png
>
>> Furthermore, the pins for gmac0_clk_ref (GPIO 45) and gmac1_clk_ref
>> (GPIO 46) may be used as GPIOs for other functions even when the
>> Ethernet controller is active. Splitting these into independent groups
>> avoids pinmux conflicts and allows boards to use the reference clock
>> signal only when it is actually needed.
>>
>
>> Fixes: 60775f28cfb7 ("riscv: dts: spacemit: Add Ethernet support for K1")
>> Signed-off-by: Junhui Liu <junhui.liu@xxxxxxxxxxxxx>
--
Best regards,
Junhui Liu