Re: [PATCH v2 2/3] soc: qcom: spm: Add MSM8960 SAW2 CPU support

[Dmitry Baryshkov]

On Wed, May 27, 2026 at 08:39:29PM -0700, Rudraksha Gupta via B4 Relay wrote:
> From: Rudraksha Gupta <guptarud@xxxxxxxxx>
> 
> The MSM8960 uses SAW2 v1.1, the same hardware version as the APQ8064.
> Add SPM register data so that the SAW2 driver can program the correct
> SPM sequences and PMIC parameters for MSM8960 CPUs.
> 
> Link: https://github.com/CyanogenMod/android_kernel_samsung_d2/blob/0dbe2b56847b304d30b809dfd08ba3b4a61d9af8/arch/arm/mach-msm/board-express.c#L3265-L3285
> Link: https://github.com/CyanogenMod/android_kernel_samsung_d2/blob/0dbe2b56847b304d30b809dfd08ba3b4a61d9af8/arch/arm/mach-msm/board-express.c#L3353-L3381
> Assisted-by: Claude:claude-opus-4.6
> Signed-off-by: Rudraksha Gupta <guptarud@xxxxxxxxx>
> ---
>  drivers/soc/qcom/spm.c | 20 +++++++++++++++++++-
>  1 file changed, 19 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/soc/qcom/spm.c b/drivers/soc/qcom/spm.c
> index f75659fff287..fb3ec8aa42b0 100644
> --- a/drivers/soc/qcom/spm.c
> +++ b/drivers/soc/qcom/spm.c
> @@ -233,7 +233,7 @@ static const u16 spm_reg_offset_v1_1[SPM_REG_NR] = {
>  
>  static void smp_set_vdd_v1_1(void *data);
>  
> -/* SPM register data for 8064 */
> +/* SPM register data for 8064, 8960 */
>  static struct linear_range spm_v1_1_regulator_range =
>  	REGULATOR_LINEAR_RANGE(700000, 0, 56, 12500);
>  
> @@ -253,6 +253,22 @@ static const struct spm_reg_data spm_reg_8064_cpu = {
>  	.ramp_delay = 1250,
>  };
>  
> +static const struct spm_reg_data spm_reg_8960_cpu = {
> +	.reg_offset = spm_reg_offset_v1_1,
> +	.spm_cfg = 0x1f,
> +	.pmic_dly = 0x03020004,

Except for this value, the programming is the same as the existing
APQ8064. But, APQ8064 seems to have an error there, it also should be
using this pmic_dly.

But#2, both APQ8064 and MSM8960 should only be using this table for the
SAW2 of the first CPU core. The rest should be using a slightly
different config (at least according to msm-3.4 tree I'm looking at).
Would you please fix that?

Please make existing APQ8064 entry use pmic_dly of 0x03020004, use it
for 8960 too. Then add new compat (something like
qcom,apq8064-saw2-v1.1-secondary) and use it for the CPU 1-3 on APQ8064
and similarly qcom,msm8960-saw2-secondary for CPU1 on MSM8960. Feel free
to propose a better name.

> +	.pmic_data[0] = 0x0084009c,
> +	.pmic_data[1] = 0x00a4001c,
> +	.seq = { 0x03, 0x0f, 0x00, 0x24, 0x54, 0x10, 0x09, 0x03, 0x01,
> +		0x10, 0x54, 0x30, 0x0c, 0x24, 0x30, 0x0f },
> +	.start_index[PM_SLEEP_MODE_STBY] = 0,
> +	.start_index[PM_SLEEP_MODE_SPC] = 2,
> +	.set_vdd = smp_set_vdd_v1_1,
> +	.range = &spm_v1_1_regulator_range,
> +	.init_uV = 1300000,
> +	.ramp_delay = 1250,
> +};
> +
>  static inline void spm_register_write(struct spm_driver_data *drv,
>  					enum spm_reg reg, u32 val)
>  {
> @@ -501,6 +517,8 @@ static const struct of_device_id spm_match_table[] = {
>  	  .data = &spm_reg_8974_8084_cpu },
>  	{ .compatible = "qcom,apq8064-saw2-v1.1-cpu",
>  	  .data = &spm_reg_8064_cpu },
> +	{ .compatible = "qcom,msm8960-saw2-cpu",
> +	  .data = &spm_reg_8960_cpu },
>  	{ },
>  };
>  MODULE_DEVICE_TABLE(of, spm_match_table);
> 
> -- 
> 2.54.0
> 
> 

-- 
With best wishes
Dmitry