[PATCH 6/7] gpio: ppc44x: drop PPC-specific IO helpers and rename to ppc44x
From: Rosen Penev
Date: Tue Jun 02 2026 - 01:07:29 EST
Replace PPC-specific clrbits32()/setbits32() with local helpers using
ioread32be()/iowrite32be() which are equivalent on PPC since commit
894fa235eb4c ("powerpc: inline iomap accessors"). This allows the
driver to be compiled on any architecture with COMPILE_TEST.
- Changed Kconfig dependency to depends on 44x || COMPILE_TEST
Assisted-by: opencode:big-pickle
Signed-off-by: Rosen Penev <rosenp@xxxxxxxxx>
---
drivers/gpio/Kconfig | 3 +-
drivers/gpio/gpio-ppc44x.c | 88 ++++++++++++++++++++++----------------
2 files changed, 53 insertions(+), 38 deletions(-)
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 77991da43ec1..7374f82b7040 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -595,9 +595,8 @@ config GPIO_POLARFIRE_SOC
config GPIO_PPC44X
tristate "PPC44x GPIO support"
- depends on 44x
+ depends on 44x || COMPILE_TEST
select GPIO_GENERIC
- select GPIOLIB
help
Enable gpiolib support for ppc440 based boards.
diff --git a/drivers/gpio/gpio-ppc44x.c b/drivers/gpio/gpio-ppc44x.c
index 6b4814ed12b5..cc7796e0cfbd 100644
--- a/drivers/gpio/gpio-ppc44x.c
+++ b/drivers/gpio/gpio-ppc44x.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
- * PPC4xx gpio driver
+ * PPC44x gpio driver
*
* Copyright (c) 2008 Harris Corporation
* Copyright (c) 2008 Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>, Pengutronix
@@ -22,7 +22,7 @@
#define GPIO_MASK2(gpio) (0xc0000000 >> ((gpio) * 2))
/* Physical GPIO register layout */
-struct ppc4xx_gpio {
+struct ppc44x_gpio {
__be32 or;
__be32 tcr;
__be32 osrl;
@@ -43,11 +43,27 @@ struct ppc4xx_gpio {
__be32 isr3h;
};
-struct ppc4xx_gpio_chip {
+struct ppc44x_gpio_chip {
struct gpio_generic_chip chip;
void __iomem *regs;
};
+static inline void ppc44x_clrbits32(void __iomem *addr, u32 mask)
+{
+ u32 val = ioread32be(addr);
+
+ val &= ~mask;
+ iowrite32be(val, addr);
+}
+
+static inline void ppc44x_setbits32(void __iomem *addr, u32 mask)
+{
+ u32 val = ioread32be(addr);
+
+ val |= mask;
+ iowrite32be(val, addr);
+}
+
/*
* GPIO LIB API implementation for GPIOs
*
@@ -55,9 +71,9 @@ struct ppc4xx_gpio_chip {
*/
static inline void
-__ppc4xx_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
+__ppc44x_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
{
- struct ppc4xx_gpio_chip *chip = gpiochip_get_data(gc);
+ struct ppc44x_gpio_chip *chip = gpiochip_get_data(gc);
struct gpio_generic_chip *gen_gc = &chip->chip;
if (val)
@@ -68,29 +84,29 @@ __ppc4xx_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
gpio_generic_write_reg(gen_gc, gen_gc->reg_set, gen_gc->sdata);
}
-static int ppc4xx_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
+static int ppc44x_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
{
- struct ppc4xx_gpio_chip *chip = gpiochip_get_data(gc);
+ struct ppc44x_gpio_chip *chip = gpiochip_get_data(gc);
struct gpio_generic_chip *gen_gc = &chip->chip;
- struct ppc4xx_gpio __iomem *regs = chip->regs;
+ struct ppc44x_gpio __iomem *regs = chip->regs;
unsigned long flags;
gpio_generic_chip_lock_irqsave(gen_gc, flags);
/* Disable open-drain function */
- clrbits32(®s->odr, GPIO_MASK(gpio));
+ ppc44x_clrbits32(®s->odr, GPIO_MASK(gpio));
/* Float the pin */
- clrbits32(®s->tcr, GPIO_MASK(gpio));
+ ppc44x_clrbits32(®s->tcr, GPIO_MASK(gpio));
gen_gc->sdir &= ~GPIO_MASK(gpio);
/* Bits 0-15 use TSRL/OSRL, bits 16-31 use TSRH/OSRH */
if (gpio < 16) {
- clrbits32(®s->osrl, GPIO_MASK2(gpio));
- clrbits32(®s->tsrl, GPIO_MASK2(gpio));
+ ppc44x_clrbits32(®s->osrl, GPIO_MASK2(gpio));
+ ppc44x_clrbits32(®s->tsrl, GPIO_MASK2(gpio));
} else {
- clrbits32(®s->osrh, GPIO_MASK2(gpio));
- clrbits32(®s->tsrh, GPIO_MASK2(gpio));
+ ppc44x_clrbits32(®s->osrh, GPIO_MASK2(gpio));
+ ppc44x_clrbits32(®s->tsrh, GPIO_MASK2(gpio));
}
gpio_generic_chip_unlock_irqrestore(gen_gc, flags);
@@ -99,32 +115,32 @@ static int ppc4xx_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
}
static int
-ppc4xx_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
+ppc44x_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
{
- struct ppc4xx_gpio_chip *chip = gpiochip_get_data(gc);
+ struct ppc44x_gpio_chip *chip = gpiochip_get_data(gc);
struct gpio_generic_chip *gen_gc = &chip->chip;
- struct ppc4xx_gpio __iomem *regs = chip->regs;
+ struct ppc44x_gpio __iomem *regs = chip->regs;
unsigned long flags;
gpio_generic_chip_lock_irqsave(gen_gc, flags);
/* First set initial value */
- __ppc4xx_gpio_set(gc, gpio, val);
+ __ppc44x_gpio_set(gc, gpio, val);
/* Disable open-drain function */
- clrbits32(®s->odr, GPIO_MASK(gpio));
+ ppc44x_clrbits32(®s->odr, GPIO_MASK(gpio));
/* Drive the pin */
- setbits32(®s->tcr, GPIO_MASK(gpio));
+ ppc44x_setbits32(®s->tcr, GPIO_MASK(gpio));
gen_gc->sdir |= GPIO_MASK(gpio);
/* Bits 0-15 use TSRL, bits 16-31 use TSRH */
if (gpio < 16) {
- clrbits32(®s->osrl, GPIO_MASK2(gpio));
- clrbits32(®s->tsrl, GPIO_MASK2(gpio));
+ ppc44x_clrbits32(®s->osrl, GPIO_MASK2(gpio));
+ ppc44x_clrbits32(®s->tsrl, GPIO_MASK2(gpio));
} else {
- clrbits32(®s->osrh, GPIO_MASK2(gpio));
- clrbits32(®s->tsrh, GPIO_MASK2(gpio));
+ ppc44x_clrbits32(®s->osrh, GPIO_MASK2(gpio));
+ ppc44x_clrbits32(®s->tsrh, GPIO_MASK2(gpio));
}
gpio_generic_chip_unlock_irqrestore(gen_gc, flags);
@@ -134,14 +150,14 @@ ppc4xx_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
return 0;
}
-static int ppc4xx_gpio_probe(struct platform_device *ofdev)
+static int ppc44x_gpio_probe(struct platform_device *ofdev)
{
struct device *dev = &ofdev->dev;
struct device_node *np = dev->of_node;
- struct ppc4xx_gpio_chip *chip;
+ struct ppc44x_gpio_chip *chip;
struct gpio_generic_chip_config config;
struct gpio_chip *gc;
- struct ppc4xx_gpio __iomem *regs;
+ struct ppc44x_gpio __iomem *regs;
int ret;
chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
@@ -169,8 +185,8 @@ static int ppc4xx_gpio_probe(struct platform_device *ofdev)
gc = &chip->chip.gc;
gc->fwnode = dev_fwnode(dev);
- gc->direction_input = ppc4xx_gpio_dir_in;
- gc->direction_output = ppc4xx_gpio_dir_out;
+ gc->direction_input = ppc44x_gpio_dir_in;
+ gc->direction_output = ppc44x_gpio_dir_out;
gc->label = devm_kasprintf(dev, GFP_KERNEL, "%pOF", np);
if (!gc->label)
@@ -179,20 +195,20 @@ static int ppc4xx_gpio_probe(struct platform_device *ofdev)
return devm_gpiochip_add_data(dev, gc, chip);
}
-static const struct of_device_id ppc4xx_gpio_match[] = {
+static const struct of_device_id ppc44x_gpio_match[] = {
{
.compatible = "ibm,ppc4xx-gpio",
},
{},
};
-MODULE_DEVICE_TABLE(of, ppc4xx_gpio_match);
+MODULE_DEVICE_TABLE(of, ppc44x_gpio_match);
-static struct platform_driver ppc4xx_gpio_driver = {
- .probe = ppc4xx_gpio_probe,
+static struct platform_driver ppc44x_gpio_driver = {
+ .probe = ppc44x_gpio_probe,
.driver = {
- .name = "ppc4xx-gpio",
- .of_match_table = ppc4xx_gpio_match,
+ .name = "ppc44x-gpio",
+ .of_match_table = ppc44x_gpio_match,
},
};
-module_platform_driver(ppc4xx_gpio_driver);
+module_platform_driver(ppc44x_gpio_driver);
--
2.54.0