[PATCH v3 4/5] arm64: dts: imx93-var-som-symphony: enable TPM3 PWM
From: Stefano Radaelli
Date: Wed Jun 03 2026 - 04:42:25 EST
From: Stefano Radaelli <stefano.r@xxxxxxxxxxxxx>
Enable TPM3 on the Symphony carrier board and add the pinctrl states for
the PWM output and sleep configuration.
Signed-off-by: Stefano Radaelli <stefano.r@xxxxxxxxxxxxx>
---
v2->v3:
-
v1->v2:
-
.../dts/freescale/imx93-var-som-symphony.dts | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts b/arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts
index c835394468ef..56f8744c861a 100644
--- a/arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts
@@ -320,6 +320,13 @@ &lpuart7 {
status = "okay";
};
+&tpm3 {
+ pinctrl-0 = <&pinctrl_tpm3>;
+ pinctrl-1 = <&pinctrl_tpm3_sleep>;
+ pinctrl-names = "default", "sleep";
+ status = "okay";
+};
+
&usbotg1 {
dr_mode = "otg";
hnp-disable;
@@ -442,6 +449,18 @@ MX93_PAD_PDM_BIT_STREAM1__GPIO1_IO10 0x31e
>;
};
+ pinctrl_tpm3: tpm3grp {
+ fsl,pins = <
+ MX93_PAD_GPIO_IO24__TPM3_CH3 0x51e
+ >;
+ };
+
+ pinctrl_tpm3_sleep: tpm3sleepgrp {
+ fsl,pins = <
+ MX93_PAD_GPIO_IO24__GPIO2_IO24 0x51e
+ >;
+ };
+
pinctrl_uart1: uart1grp {
fsl,pins = <
MX93_PAD_UART1_RXD__LPUART1_RX 0x31e
--
2.47.3