Re: [PATCH v5 2/6] LoongArch: KVM: Check msgint feature in interrupt post

[Huacai Chen]

Hi, Bibo,

On Tue, May 26, 2026 at 8:53 PM Bibo Mao <maobibo@xxxxxxxxxxx> wrote:
>
> Interrupt AVEC is valid only if VM has msgint feature, and this feature
> is checked in interrupt handling. Since interrupt handling is executing
> in VM context switch, and it is hot path, here move the feature checking
> in interrupt post rather than interrupt handling.
>
> Signed-off-by: Bibo Mao <maobibo@xxxxxxxxxxx>
> ---
>  arch/loongarch/kvm/interrupt.c |  5 -----
>  arch/loongarch/kvm/vcpu.c      | 14 +++++++++-----
>  2 files changed, 9 insertions(+), 10 deletions(-)
>
> diff --git a/arch/loongarch/kvm/interrupt.c b/arch/loongarch/kvm/interrupt.c
> index a18c60dffbba..48dd56aa4dc5 100644
> --- a/arch/loongarch/kvm/interrupt.c
> +++ b/arch/loongarch/kvm/interrupt.c
> @@ -36,8 +36,6 @@ static int kvm_irq_deliver(struct kvm_vcpu *vcpu, unsigned int priority)
>
>         switch (priority) {
>         case INT_AVEC:
> -               if (!kvm_guest_has_msgint(&vcpu->arch))
> -                       break;
>                 dmsintc_inject_irq(vcpu);
>                 fallthrough;
>         case INT_TI:
> @@ -75,9 +73,6 @@ static int kvm_irq_clear(struct kvm_vcpu *vcpu, unsigned int priority)
>
>         switch (priority) {
>         case INT_AVEC:
> -               if (!kvm_guest_has_msgint(&vcpu->arch))
> -                       break;
> -               fallthrough;
>         case INT_TI:
>         case INT_IPI:
>         case INT_SWI0:
> diff --git a/arch/loongarch/kvm/vcpu.c b/arch/loongarch/kvm/vcpu.c
> index df5be9b265e8..ebd432da3ca4 100644
> --- a/arch/loongarch/kvm/vcpu.c
> +++ b/arch/loongarch/kvm/vcpu.c
> @@ -1493,14 +1493,18 @@ int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, struct kvm_interrupt *irq)
>         if (vector >= EXCCODE_INT_NUM)
>                 return -EINVAL;
>
> -       if (intr > 0)
> +       if (!kvm_guest_has_msgint(&vcpu->arch) && (vector == INT_AVEC))
> +               return -EINVAL;
> +
> +       /*
> +        * Clear irq with INT_SWI0 (which is 0) is missing from SW side
> +        * INT_SWI0 is cleared by guest kernel with the similar instruction
> +        * clear_csr_estat(1 << INT_SWI0)
> +        */
> +       if (intr >= 0)
>                 kvm_queue_irq(vcpu, intr);
>         else if (intr < 0)
I think "else if (intr < 0)" can be simplified as "else".


Huacai

>                 kvm_dequeue_irq(vcpu, -intr);
> -       else {
> -               kvm_err("%s: invalid interrupt ioctl %d\n", __func__, irq->irq);
> -               return -EINVAL;
> -       }
>
>         kvm_vcpu_kick(vcpu);
>
> --
> 2.39.3
>
>