Re: [PATCH 3/3] clk: qcom: lcc-msm8960: re-apply PLL4 mux on resume

[Konrad Dybcio]

On 6/2/26 6:50 AM, Herman van Hazendonk wrote:
> The LPASS power domain on the MSM8x60 family is collapsed during
> system sleep, which resets the LPASS Primary PLL Mux register at 0xc4
> to its hardware default of 0 (PXO). The probe path arms this register
> to 0x1 (PLL4) and the rest of the LCC clock tree assumes that
> selection; after the first suspend/resume cycle every LCC clock
> silently returns sourced from PXO at 27 MHz, with no diagnostic, and
> audio produces wrong rates until the next reboot.
> 
> Add a resume PM op that re-asserts PLL4 on the mux. The single
> register write is idempotent on platforms that do not exhibit the
> power-collapse (the mux is already at 0x1 from probe), so it is safe
> to run unconditionally for all compatibles. Stash the regmap in
> drvdata during probe so resume can write without walking the
> clock-provider tree.
> 
> dev_err / raw errno are used here (not dev_err_probe) because resume
> cannot defer.
> 
> Use pm_ptr(), not pm_sleep_ptr(), to assign the dev_pm_ops pointer.
> pm_ptr() is the correct macro for conditionally compiling the .pm
> struct pointer based on CONFIG_PM; pm_sleep_ptr() is intended for
> gating individual function pointers inside the struct on
> CONFIG_PM_SLEEP.
> 
> Signed-off-by: Herman van Hazendonk <github.com@xxxxxxxxxx>
> ---

This seems like more of a workaround, but the aforementioned PLL seems
to not be registered with Linux.. what drives it? Is there an ADSP on
this platform?

Konrad