[PATCH 2/2] power: sequencing: pcie-m2: Add 3.3Vaux supply support

From: Sherry Sun (OSS)

Date: Mon Jun 08 2026 - 23:39:18 EST


From: Sherry Sun <sherry.sun@xxxxxxx>

Add 3.3Vaux separately for special handling. This supply has a different
lifecycle - it must remain enabled during system suspend to support PCIe
L2 link state and wake-up mechanisms.

Signed-off-by: Sherry Sun <sherry.sun@xxxxxxx>
---
drivers/power/sequencing/pwrseq-pcie-m2.c | 42 ++++++++++++++++++++++-
1 file changed, 41 insertions(+), 1 deletion(-)

diff --git a/drivers/power/sequencing/pwrseq-pcie-m2.c b/drivers/power/sequencing/pwrseq-pcie-m2.c
index e82821655fc4..6b8c77cf20a9 100644
--- a/drivers/power/sequencing/pwrseq-pcie-m2.c
+++ b/drivers/power/sequencing/pwrseq-pcie-m2.c
@@ -37,6 +37,8 @@ struct pwrseq_pcie_m2_ctx {
const struct pwrseq_pcie_m2_pdata *pdata;
struct regulator_bulk_data *regs;
size_t num_vregs;
+ struct regulator *vaux_reg;
+ bool vaux_enabled;
struct notifier_block nb;
struct gpio_desc *w_disable1_gpio;
struct gpio_desc *w_disable2_gpio;
@@ -48,8 +50,23 @@ struct pwrseq_pcie_m2_ctx {
static int pwrseq_pcie_m2_vregs_enable(struct pwrseq_device *pwrseq)
{
struct pwrseq_pcie_m2_ctx *ctx = pwrseq_device_get_drvdata(pwrseq);
+ int ret;
+
+ /* Enable 3.3Vaux if present and not already enabled. */
+ if (ctx->vaux_reg && !ctx->vaux_enabled) {
+ ret = regulator_enable(ctx->vaux_reg);
+ if (ret)
+ return ret;
+ ctx->vaux_enabled = true;
+ }

- return regulator_bulk_enable(ctx->num_vregs, ctx->regs);
+ ret = regulator_bulk_enable(ctx->num_vregs, ctx->regs);
+ if (ret && ctx->vaux_reg && ctx->vaux_enabled) {
+ regulator_disable(ctx->vaux_reg);
+ ctx->vaux_enabled = false;
+ }
+
+ return ret;
}

static int pwrseq_pcie_m2_vregs_disable(struct pwrseq_device *pwrseq)
@@ -497,10 +514,28 @@ static int pwrseq_pcie_m2_probe(struct platform_device *pdev)
return dev_err_probe(dev, -ENODEV,
"Failed to obtain platform data\n");

+ /*
+ * Get 3.3Vaux separately for special handling. This supply has a
+ * different lifecycle - it must remain enabled during system suspend
+ * to support PCIe L2 link state and wake-up mechanisms.
+ */
+ ctx->vaux_reg = devm_regulator_get_optional(dev, "vpcie3v3aux");
+ if (IS_ERR(ctx->vaux_reg)) {
+ if (PTR_ERR(ctx->vaux_reg) != -ENODEV)
+ return PTR_ERR(ctx->vaux_reg);
+ ctx->vaux_reg = NULL;
+ }
+ ctx->vaux_enabled = false;
+
/*
* Currently, of_regulator_bulk_get_all() is the only regulator API that
* allows to get all supplies in the devicetree node without manually
* specifying them.
+ *
+ * This will include vaux again, but we'll manage it separately via
+ * vaux_reg. The regulator framework handles multiple gets of the same
+ * regulator correctly via refcounting, so having vaux in both places is
+ * safe.
*/
ret = of_regulator_bulk_get_all(dev, dev_of_node(dev), &ctx->regs);
if (ret < 0)
@@ -573,6 +608,11 @@ static void pwrseq_pcie_m2_remove(struct platform_device *pdev)
pwrseq_pcie_m2_remove_serdev(ctx, NULL);
mutex_destroy(&ctx->list_lock);

+ if (ctx->vaux_reg && ctx->vaux_enabled) {
+ regulator_disable(ctx->vaux_reg);
+ ctx->vaux_enabled = false;
+ }
+
regulator_bulk_free(ctx->num_vregs, ctx->regs);
}

--
2.50.1